Ms. Srividya Jayaram Profile

Srividya Jayaram

Product Engineering Manager at Siemens EDA

SPIE Involvement:

Conference Program Committee | Author

Publications (28)

Proceedings Article | 10 April 2024 Poster + Paper

Poster + Paper

Fast and accurate automatic wafer defect detection and classification using machine learning based SEM image analysis

Sanghyun Choi, Qian Xie, Nathan Greeneltch, Hyung Joo Lee, Mohan Govindaraj, Srividya Jayaram, Mark Pereira, Sayani Biswas, Samir Bhamidipati, Ilhami Torunoglu

Proceedings Volume 12955, 129553M (2024) https://doi.org/10.1117/12.3012184

KEYWORDS: Education and training, Scanning electron microscopy, Data modeling, Performance modeling, Defect detection, Machine learning, Object detection, Semiconducting wafers, Image analysis, Image quality

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Proceedings Article | 10 April 2024 Poster + Paper

Poster + Paper

Advanced process control by machine learning-based virtual metrology for high product mix manufacturing

Hyung Joo Lee, Sanghyun Choi, Nathan Greeneltch, Srividya Jayaram

Proceedings Volume 12955, 1295526 (2024) https://doi.org/10.1117/12.3009796

KEYWORDS: Advanced process control, Vacuum chambers, Chemical vapor deposition, Manufacturing, Control systems, Film thickness, Data modeling, Metrology, Simulations, Machine learning

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Proceedings Article | 30 April 2023 Presentation

Presentation

Extending design technology co-optimization from technology launch to HVM

Le Hong, Fan Jiang, Yuansheng Ma, Srividya Jayaram, Joe Kwan, Haizhou Yin, Xiaoyuan Qi, Junjiang Lei

Proceedings Volume 12495, 124950G (2023) https://doi.org/10.1117/12.2658652

KEYWORDS: Manufacturing, Optical proximity correction, Failure analysis, Design for manufacturability, Analytics, Semiconductors, Semiconducting wafers, Metrology, Inspection, Design for manufacturing

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Proceedings Article | 28 April 2023 Paper

Paper

Design-aware virtual metrology and process recipe recommendation

Nathan Greeneltch, Haizhou Yin, J. Andres Torres, Melody Tao, Steven Lubin, Srividya Jayaram, Ivan Kissiov, Martin Niehoff, Marcus Wolf, Paul Jungmann, Todd Bailey

Proceedings Volume 12495, 124951V (2023) https://doi.org/10.1117/12.2661150

KEYWORDS: Data modeling, Semiconducting wafers, Metrology, Modeling, Machine learning, Fabrication, Data processing, Semiconductors, Process modeling, Deposition processes

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Proceedings Article | 27 April 2023 Paper

Paper

AI-guided reliability diagnosis for 5,7nm automotive process

Dongin Kim, Hyung Joo Lee, Sanghyun Choi, Seungpyo Hong, Seungjae Lee, Doohwan Kwak, Srividya Jayaram, Seungwon Paek, Minho Kwon, Yeongdo Kim, Hyobe Jung, Ivan Kissiov, Melody Tao, Andres Torres, Nathan Greeneltch, Ho Lee

Proceedings Volume 12496, 124963J (2023) https://doi.org/10.1117/12.2662880

KEYWORDS: Reliability, Semiconducting wafers, Data modeling, Manufacturing, Fabrication, Semiconductors, Industry, High volume manufacturing, Model-based design, Metrology

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Proceedings Article | 26 May 2022 Paper

Paper

Virtual cross metrology: leveraging process sequence for improved process characterization

J. Andres Torres, Ivan Kissiov, Melody Tao, Graham Mueller, Stefan Schueler, Carsten Hartig, Richard Gardner, Srividya Jayaram

Proceedings Volume 12053, 120531B (2022) https://doi.org/10.1117/12.2614943

KEYWORDS: Process modeling, Process control, Metrology, Calibration, Semiconducting wafers, Neodymium, Error analysis, Control systems, Semiconductors, Machine learning

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Proceedings Article | 22 February 2021 Presentation + Paper

Presentation + Paper

Virtual metrology: how to build the bridge between the different data sources

Stefan Schueler, Carsten Hartig, Andres Torres, Ivan Kissiov, Richard Gardner, Essam Mohamed, Srividya Jayaram

Proceedings Volume 11611, 116112D (2021) https://doi.org/10.1117/12.2588467

KEYWORDS: Metrology, Bridges, Manufacturing, Data modeling, Time metrology, Semiconducting wafers, Reticles, Internet, Design for manufacturability, Data integration

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Proceedings Article | 23 March 2020 Paper

Paper

Model based CAOPC flow for memory chips to improve performance and consistency of RET solutions

Srividya Jayaram, Sherif Hany Mousa, Ashutosh Rathi, Pat LaCour, Zhenguo Zheng, Lei Zhang, Yaobin Feng, Jun Yao

Proceedings Volume 11327, 1132709 (2020) https://doi.org/10.1117/12.2551829

KEYWORDS: Optical proximity correction, SRAF, Resolution enhancement technologies, Lithography, Model-based design, Manufacturing, Pattern recognition

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Proceedings Article | 23 March 2020 Presentation + Paper

Presentation + Paper

Reduction of systematic defects with machine learning from design to fab

Yuansheng Ma, Le Hong, James Word, Fan Jiang, Vlad Liubich, Liang Cao, Srividya Jayaram, Doohwan Kwak, YoungChang Kim, Germain Fenger, Ananthan Raghunathan, Joerg Mellmann

Proceedings Volume 11329, 1132909 (2020) https://doi.org/10.1117/12.2551703

KEYWORDS: Machine learning, Optical proximity correction, Photomasks, Etching, Data modeling, Process modeling, Neural networks, Semiconducting wafers, Inspection

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Proceedings Article | 26 March 2019 Presentation + Paper

Presentation + Paper

Implementation of different cost functions for EUV mask optimization for next generation beyond 7nm

Fan Jiang, Alexander Tritchkov, Alex Wei, Srividya Jayaram, Yuyang Sun, Xima Zhang, James Word

Proceedings Volume 10957, 1095712 (2019) https://doi.org/10.1117/12.2513560

KEYWORDS: SRAF, Image quality, Extreme ultraviolet, Extreme ultraviolet lithography, Photomasks, Lithography

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As the technology node gets smaller and smaller, the benefit from Sub-Resolution Assist Features (SRAF) becomes significant in EUV lithography which makes SRAFs a must-have tool for next generation beyond 7nm technology. When considering EUV specific effects, the metrics that need to be accounted for include Image Log-Slope (ILS), Process Variability (PV Band), common Depth of Focus (cDOF), and Image Shift (ImS) through focus. When these critical factors are accounted for during the EUV mask generation the optimization become much more complicated and challenging and necessitates the need for SRAFs beyond 7nm. SRAF helps enhance not only the PV Band, but more importantly helps boost the ILS, which is one of the key factors for improving stochastic effect in EUV. However, ILS is just one of the important image quality metric that we should focus on. For metal layers, Image Shift is another key factor which can have a big impact on overlay. ImS at the nominal condition could be compensated by Optical Proximity Correction (OPC), but image shift through focus can hardly be tuned by the main feature correction. The image shift through focus can be mitigated by SRAF insertion. Strong 3D mask effects can cause best focuses of different patterns to be far apart in EUV, which can cause an unusable cDOF even when the individual depth of focus values of all the patterns are not bad. SRAFs can be inserted to improve the individual depth of focus and align the best focuses together to help enhance the common process window. When taking account of various different EUV specific metrics mentioned above, then the most critical question for the next generation beyond 7nm is “How to define the cost function for mask optimization with SRAFs?” (Figure 1, EUV mask optimization flow for next generation beyond 7nm). In this study the image quality metrics including ILS, PVBand, cDOF, and ImS are evaluated. For each optimization schema using different cost functions, we examine the cost function metric and its impact on the other image quality metrics. We also present the potential trade-offs together with the analysis. Furthermore, multiple cross cost functions are defined for SRAF optimization and the results are analyzed accordingly. Both contact and metal layer patterns representing next generation beyond 7nm design rules are investigated. In our testing, symmetric standard sources from ASML NXE3400 is examined and the results are compared and analyzed.

Proceedings Article | 22 October 2018 Presentation + Paper

Presentation + Paper

Lithographic benefits and mask manufacturability study of curvilinear masks

Vivian Wei Guo, Fan Jiang, Jed Rankin, Ingo Bork, Alexander Tritchkov, Alexander Wei, Yuyang Sun, Srividya Jayaram, Larry Zhuang, Xima Zhang, Todd Bailey, James Word

Proceedings Volume 10810, 108100P (2018) https://doi.org/10.1117/12.2501973

KEYWORDS: Photomasks, SRAF, Printing, Lithography, Vestigial sideband modulation, Semiconducting wafers, Optical proximity correction, Manufacturing, Image quality, Image processing

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SPIE Journal Paper | 31 July 2018

Subresolution assist features impact and implementation in extreme ultraviolet lithography for next-generation beyond 7-nm node

Vivian Wei Guo, Fan Jiang, Alexander Tritchkov, Srividya Jayaram, Scott Mansfield, Larry Zhuang, Yuyang Sun, Xima Zhang, Todd Bailey, James Word

JM3, Vol. 18, Issue 01, 011003, (July 2018) https://doi.org/10.1117/12.10.1117/1.JMM.18.1.011003

KEYWORDS: SRAF, Photomasks, Metals, Extreme ultraviolet lithography, Personal protective equipment, Photovoltaics, Extreme ultraviolet, Image quality, Source mask optimization, Lithography

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The next-generation beyond 7-nm node potentially requires the implementation of subresolution assist features (SRAF) with extreme ultraviolet (EUV) lithography. This paper aims at providing a clear SRAF strategy for the next-generation beyond 7-nm node designs through a series of experiments. Various factors are considered, including stochastic effects, three-dimensional (3-D) mask effects, through-slit effects, aberrations, and pixelated source mask optimization (SMO) sources. We consider process variability bands with a variety of process conditions, including focus/dose/mask bias changes and also the normalized image log-slope/image log-slope as our objective functions, to determine what the best SRAF solution is for a set of test patterns. Inverse lithography technology is implemented to optimize both the main feature (MF) mask and SRAF placement, in particular, asymmetric SRAF placement to balance the 3-D mask effects. SRAF can potentially mitigate image shift through-focus, i.e., nontelecentricity, caused by EUV 3-D shadowing effect. This shadowing effect is pattern-dependent and contributes to the overlay variation. As we approach the next-generation beyond 7-nm node, this image shift can be more significant relative to the overlay budget, hence, we further investigate the impact of SRAF placement to the image shift. Moreover, the center of focus shift due to the large 3-D mask absorber thickness can be potentially mitigated by SRAF implementation. The common process window is significantly impacted by both the center of focus shift and the individual depth of focus and is evaluated using both metal and contact layer test cases. We study the source impact to SRAF insertion by experimenting with both a symmetric source (standard source) and an asymmetric source (SMO source). Finally, we understand the importance of using full flare map and full through-slit model (including aberration variation through-slit) in the MF correction. Furthermore, we evaluate the need of using full models in SRAF insertion. This is a necessary step to determine the strategy of SRAF implementation for the next-generation beyond 7-nm node.

Proceedings Article | 20 March 2018 Presentation + Paper

Presentation + Paper

Model-assisted template extraction SRAF application to contact holes patterns in high-end flash memory device fabrication

Ahmed Seoud, Juhwan Kim, Yuansheng Ma, Srividya Jayaram, Le Hong, Gyu-Yeol Chae, Jeong-Woo Lee, Dae-Jin Park, Hyoung-Soon Yune, Se-Young Oh, Chan-Ha Park

Proceedings Volume 10587, 105870L (2018) https://doi.org/10.1117/12.2297659

KEYWORDS: SRAF, Lithography, Optical proximity correction, Optical lithography

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Proceedings Article | 19 March 2018 Paper

Paper

SRAF requirements, relevance, and impact on EUV lithography for next-generation beyond 7nm node

Vivian Wei Guo, Fan Jiang, Alexander Tritchkov, Srividya Jayaram, Scott Mansfield, Larry Zhuang, Yuyang Sun, Xima Zhang, Todd Bailey

Proceedings Volume 10583, 105830N (2018) https://doi.org/10.1117/12.2297410

KEYWORDS: SRAF, Photomasks, Extreme ultraviolet lithography, Image quality, Source mask optimization, Optical proximity correction

Read Abstract +

The next generation beyond 7nm node potentially requires the implementation of Sub-Resolution Assist Features (SRAF) with EUV lithography. This paper aims at providing a clear SRAF strategy for the next generation beyond 7nm node designs through a series of experiments. Various factors are considered, including: stochastic effects, 3D mask effects, through-slit effects, aberrations, and pixelated SMO sources.

EUV has 13.5nm as its wavelength, which is much smaller than the wavelength used in ArF lithography, and this gives very different imaging challenges compared to the ArF case. Due to the small wavelength and numerical aperture (NA) of the current EUV tools, depth of focus is not as significant of a concern as in DUV. Instead, EUV lithography is severely challenged by stochastic effects, which are directly linked to the slope of the intensity curve. DUV SRAF has been shown to be a powerful tool for improving NILS/ILS, as well as DOF, and here we explore how that translates into EUV imaging. In this paper, we consider Process Variability (PV) Bands with a variety of process conditions including focus/dose/mask bias changes and also the NILS/ILS as our objective functions, to determine what the best SRAF solution is for a set of test patterns. We have full investigations on both symmetric SRAF and asymmetric SRAF.

SRAF can potentially mitigate image shift through focus, i.e. non-telecentricity, caused by EUV 3D shadowing effect. This shadowing effect is pattern dependent and contributes to the overlay variation. As we approach the next generation beyond 7nm node, this image shift can be more significant relative to the overlay budget, hence we further investigate the impact of SRAF placement to the image shift. Moreover, the Center of Focus shift due to the large 3D mask absorber thickness can be potentially mitigated by SRAF implementation. The common process window is significantly impacted by both the center of focus shift and the individual depth of focus. We study the change by adding SRAF using both a symmetric source (standard source) and an asymmetric source (SMO source). Once SRAF is inserted for the test patterns, the common process window is plotted to compare the solutions with and without SRAF.

Finally, we understand the importance of using full flare map and full through slit model (including aberration variation through slit) in the main feature correction, but in this paper, we will further evaluate the need of using full models in SRAF insertion. This is a necessary step to determine the strategy of SRAF implementation for the next generation beyond 7nm node.

Proceedings Article | 18 March 2016 Paper

Paper

EUV implementation of assist features in contact patterns

Fan Jiang, Ananthan Raghunathan, Martin Burkhardt, Nicole Saulnier, Alexander Tritchkov, Srividya Jayaram, James Word

Proceedings Volume 9776, 97761U (2016) https://doi.org/10.1117/12.2218315

KEYWORDS: SRAF, Printing, Extreme ultraviolet, Extreme ultraviolet lithography, Photomasks, Lithography, Model-based design, Manufacturing, Semiconducting wafers, Image quality, Resolution enhancement technologies, 3D modeling, Finite-difference time-domain method

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Proceedings Article | 9 July 2015 Paper

Paper

Effective conflict resolution strategies for SRAF placement

Shashidhara Ganjugunte, Norbert Strecker, Srividya Jayaram, Pat LaCour, Ilhami Torunoglu

Proceedings Volume 9658, 965810 (2015) https://doi.org/10.1117/12.2193023

KEYWORDS: SRAF, Semiconductor manufacturing, Manufacturing, Photomasks, Composites, Printing, Acquisition tracking and pointing, Visualization, Silicon, Semiconducting wafers

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Sub-Resolution Assist Features (SRAFs) have emerged as a key technology to enable semiconductor manufacturing for advanced technology nodes. SRAF placement is required to adhere to manufacturability constraints (MRC). MRC specifications are distance and size constraints specified by the user to ensure SRAFs are not detrimental to the final target shapes being printed. Conceptually, SRAF placement can be divided into two steps - SRAF candidate generation and SRAF candidate cleanup or conflict resolution. SRAFs generated as candidates may not adhere to MRC constraints. It is during the cleanup/conflict resolution process that the MRC constraints are enforced. In this paper we focus on the latter phase - cleanup. The goal of the cleanup phase is to retain as much of the initial candidates as possible, and, if necessary, transform them to adhere to MRC conditions. An SRAF is said to be in conflict with another shape if it violates the distance MRC constraint. One can model these conflicts using a conflict graph G=(V,E), whose vertices V correspond to geometric shapes involved in a conflict and an edge is present in E, between two vertices if the corresponding shapes are involved in a conflict. A weight is associated with each vertex that could, for example, correspond to area of the corresponding shape. The goal of conflict resolution then, is to find a transformation of the vertices so that the resulting graph is conflict free while maximizing the weight of vertices retained. This can be viewed as a generalization of the computationally hard problem of finding the largest independent set of candidates, albeit allowing for transformation. The transformations we allow include deletion, splitting, resizing, merge, and bounded translation. In this paper, we describe an approach which classifies the conflicts and apply appropriate transformations to achieve effective SRAF placement. Further, we demonstrate that such a strategy reduces the number of rules to be specified by the user, reducing the user effort needed to achieve desirable imaging results.

Proceedings Article | 1 October 2013 Paper

Paper

Model-based SRAF solutions for advanced technology nodes

Srividya Jayaram, Pat LaCour, James Word, Alexander Tritchkov

Proceedings Volume 8886, 88860P (2013) https://doi.org/10.1117/12.2031789

KEYWORDS: SRAF, Model-based design, Photomasks, Logic, Optical proximity correction, Lithography, Liquid phase epitaxy, Manufacturing, Semiconducting wafers, Process modeling

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Proceedings Article | 12 April 2013 Paper

Paper

Effective model-based SRAF placement for full chip 2D layouts

Srividya Jayaram, Pat LaCour, James Word, Alexander Tritchkov

Proceedings Volume 8683, 86830H (2013) https://doi.org/10.1117/12.2011611

KEYWORDS: SRAF, Model-based design, Photomasks, Logic, Optical proximity correction, Lithography, Liquid phase epitaxy, Manufacturing, Semiconducting wafers, Process modeling

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Proceedings Article | 23 March 2011 Paper

Paper

Influence of the illumination source on model-based SRAF placement

Rachit Gupta, Aasutosh Dave, Edita Tejnil, Srividya Jayaram, Pat LaCour

Proceedings Volume 7973, 79731U (2011) https://doi.org/10.1117/12.879492

KEYWORDS: SRAF, Model-based design, Source mask optimization, Logic, Resolution enhancement technologies, Image analysis, Optical lithography, Lithographic illumination, Lithography, Standards development

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Proceedings Article | 4 March 2010 Paper

Paper

Impact of illumination on model-based SRAF placement for contact patterning

John Sturtevant, Srividya Jayaram, Omar El-Sewefy, Aasutosh Dave, Pat LaCour

Proceedings Volume 7640, 764036 (2010) https://doi.org/10.1117/12.846620

KEYWORDS: Photovoltaics, SRAF, Model-based design, Optical lithography, Source mask optimization, Image processing, Optical proximity correction, Logic, Printing, Acquisition tracking and pointing

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Proceedings Article | 16 March 2009 Paper

Paper

Automatic SRAF size optimization during OPC

Srividya Jayaram, James Word

Proceedings Volume 7274, 72742F (2009) https://doi.org/10.1117/12.814679

KEYWORDS: SRAF, Optical proximity correction, Photovoltaics, Printing, Photomasks, Model-based design, Image processing, Resolution enhancement technologies, Visualization, Logic

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Proceedings Article | 13 March 2009 Paper

Paper

The PIXBAR OPC for contact-hole pattern in sub-70-nm generation

KunYuan Chen, ChunCheng Liao, ShuHao Chen, Todd Wey, Phoeby Cheng, Pinjan Chou, Jochen Schacht, Dyiann Chou, Srividya Jayaram

Proceedings Volume 7275, 72750Z (2009) https://doi.org/10.1117/12.813985

KEYWORDS: Optical proximity correction, Semiconducting wafers, Atrial fibrillation, Photomasks, Autoregressive models, Reticles, Electroluminescence, Lithography, Model-based design, Manufacturing

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Proceedings Article | 13 March 2009 Paper

Paper

Process variability band analysis for quantitative optimization of exposure conditions

John Sturtevant, Srividya Jayaram, Le Hong

Proceedings Volume 7275, 72751Q (2009) https://doi.org/10.1117/12.816501

KEYWORDS: Statistical analysis, Photomasks, Lithographic illumination, Lithography, Critical dimension metrology, Image enhancement, Optical proximity correction, Photovoltaics, Error analysis, Printing

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Proceedings Article | 4 December 2008 Paper

Paper

Image parameter-based scatter bar optimization

Ryan Chou, Li-Tung Hsiao, H. Y. Liao, Jack Lin, Regina Shen, Jochen Schacht, Dyiann Chou, Srividya Jayaram, Pat LaCour

Proceedings Volume 7140, 71402E (2008) https://doi.org/10.1117/12.804707

KEYWORDS: Printing, Optical proximity correction, Model-based design, Critical dimension metrology, Lithography, Optimization (mathematics), Manufacturing, SRAF, Resolution enhancement technologies, Semiconducting wafers

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Scatter Bar (SBAR) insertion is a computationally expensive operation. SBAR are usually generated rule-based. SBAR rule tables dictate the insertion of SBAR with different SBAR width dependent on the width of the printable main features and the spacing between the main features and SBAR. Optimization of the SBAR rules drives manufactures to ever more complex SBAR tables which increase the runtime. In advanced process nodes, SBAR printing issues, missing SBAR due to clean-up problems and joining SBAR of different width together remain challenging. On the other hand, pixelized inversion methods may yield optimized SBAR solutions, especially in terms of SBAR placement for contact layers, but comes at the expense of significant computational effort and increased mask writing and inspection time. Since OPC changes the spacing between SBAR and main features, an accurate and optimized SBAR solution requires OPC and SBAR optimization to run interactively. This work focuses on both line/space and contact layers To ensure fast SBAR optimization, SBAR placement and SBAR width optimization are separated. SBAR of uniform width are placed fast driven by a simple rule-based table comprising only a single SBAR width. This intermediate SBAR layer is subject into a model-based approach, which fragments the SBAR layer based on proximity with respect to the main features or other SBAR, and assigns measurement sites to each SBAR fragment. A model is used to move each SBAR fragment inward or outward so that the image cut line shows a maximum SBAR intensity closer to a predefined SBAR printing threshold. While the main features are unchanged, several iterations are applied to converge the SBAR fragments. Keeping the SBAR fragments fixed, OPC is applied to the main features. Repeating these steps allows optimization of the SBAR width and the OPC simultaneously. Site based as well as contours based verification methods are applied to ensure that the SBAR printing margin has been significantly improved. The improved SBAR printing margin allows manufactures to apply more aggressive SBAR placement rules, which, in addition to the optimized SBAR width, helps to enlarge the depth of focus, therefore, widen the common process window of the lithography process.

Proceedings Article | 19 May 2008 Paper

Paper

Impact of illumination source symmetrization in OPC

John Sturtevant, Le Hong, Srividya Jayaram, Stephen Renwick, Martin McCallum, Peter De Bisschop

Proceedings Volume 7028, 70283M (2008) https://doi.org/10.1117/12.799411

KEYWORDS: Optical proximity correction, Fiber optic illuminators, Data modeling, Scanners, Logic, Process modeling, Manufacturing, Calibration, Semiconducting wafers, Lithographic illumination

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Proceedings Article | 7 March 2008 Paper

Paper

Novel method for optimizing lithography exposure conditions using full-chip post-OPC simulation

John Sturtevant, Srividya Jayaram, Le Hong, Alexandre Drozdov

Proceedings Volume 6924, 69243P (2008) https://doi.org/10.1117/12.773335

KEYWORDS: Optical proximity correction, Lithography, Critical dimension metrology, Manufacturing, Tolerancing, Error analysis, Optimization (mathematics), Lithographic illumination, Projection systems, Statistical analysis

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Proceedings Article | 4 March 2008 Paper

Paper

Exposure tool specific post-OPC verification

John Sturtevant, Srividya Jayaram, Le Hong

Proceedings Volume 6925, 69250T (2008) https://doi.org/10.1117/12.773340

KEYWORDS: Scanners, Optical proximity correction, Data modeling, Optics manufacturing, Photomasks, Manufacturing, Process modeling, Calibration, Design for manufacturability, Printing

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Proceedings Article | 30 October 2007 Paper

Paper

Automatic assist feature placement optimization based on process-variability reduction

Srividya Jayaram, Ayman Yehia, Mohamed Bahnas, Hesham Maaty Omar, Zeki Bozkus, John Sturtevant

Proceedings Volume 6730, 67302E (2007) https://doi.org/10.1117/12.748035

KEYWORDS: SRAF, Photovoltaics, Printing, Model-based design, Tolerancing, Error analysis, Antimony, Critical dimension metrology, Semiconducting wafers, Image processing

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Showing 5 of 28 publications

Conference Committee Involvement (6)

DTCO and Computational Patterning IV

23 February 2025 | San Jose, California, United States

DTCO and Computational Patterning III

26 February 2024 | San Jose, California, United States

DTCO and Computational Patterning II

27 February 2023 | San Jose, California, United States

DTCO and Computational Patterning

26 April 2022 | San Jose, California, United States

Extreme Ultraviolet (EUV) Lithography XII

22 February 2021 | Online Only, California, United States

Showing 5 of 6 Conference Committees

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