Proceedings Article | 30 July 2002
KEYWORDS: Photomasks, Optical proximity correction, Tolerancing, Critical dimension metrology, Silicon, Image processing, Semiconducting wafers, Model-based design, Lithography, Image enhancement
In its purest form optical proximity correction (OPC) creates a mask layout to faithfully reproduce the design intent, or target, on silicon. Practical, production-worthy OPC deviates from this ideal in several respects. First, each set of anticipated process conditions -- defocus, dose -- would require a unique ideal correction. An optimized OPC shape must be derived to minimize harm over the expected ranges of process conditions. Second, the original design layout does not always convey accurate or complete information about the design intent. For example, square corners cannot be printed; how much corner rounding is acceptable? Some legacy design practices, such as line-end extension rules, anticipate (in part) proximity-effects where the intended line end is shorter than drawn. Without additional information, the OPC tool is constrained to aim for the one silicon layout matching the drawn layout as closely as possible. On the other hand, if the OPC tool is given limited liberty to deviate from drawn shapes and positions where they have little or no impact on circuit behavior the correction can be better optimized for several, sometimes competing, constraints - such as: minimizing output figure complexity, minimizing CD error through process variation, maximizing image contrast, and minimizing mask error enhancement factor. In this paper we will demonstrate OPC strategies for optimizing corrections to minimize the harmful effects of random process variations while simultaneously minimizing mask layout complexity. We introduce the concept of a 'conformal target' layout which enhances the drawn pattern with design-intent tolerance information. This information specifies bounds on minimum line and space dimensions, line position, and edge position. Such feature-specific tolerance information provides additional degrees of freedom for OPC synthesis to optimize trade-offs among process window behavior, contrast, MEEF reduction, output figure complexity, and other fab-specific objectives. Furthermore, the tolerance-based conformal target provides an ideal reference pattern for verifying OPC and other resolution enhancement treatments (RET) on the mask layout.
