Paper
19 March 2018 Resist coating and developing process technology toward EUV manufacturing sub-7nm node
Author Affiliations +
Abstract
Extreme ultraviolet lithography (EUVL) is getting closer to practical use for mass production every year. For applying EUV lithography to manufacturing, productivity improvement is a critical challenge. Throughput and yield are important factors for productivity. EUV source power is steadily advancing year by year, bringing improvements in throughput. Furthermore, yield improvement is necessary for productivity enhancement. In order to improve the yield in EUV lithography processing, further improvement of defectivity and critical dimension (CD) uniformity is required. One of the initial layers to be printed with EUV will be contact hole, therefore, we are concentrating on the productivity improvements of that layer.

In our report at SPIE 2017, defect reduction was achieved using the latest rinse technology in the development process and in-film defectivity was improved with material dispense optimization on a 24 nm contact hole (CH) pattern. On the basis of the knowledge acquired from the previous evaluation, improvements have been taken a step further in this next evaluation. As a result, 96% of residue defect reduction and 42% of in -film particle defect reduction has been achieved by further rinse optimization and improvement of dispense system.

For the other aspect of yield improvement, CD uniformity control is one of the crucial factors. CD variations are comprised of several components such as wafer to wafer CD uniformity, field to field CD uniformity. To achieve CD uniformity target for manufacturing, we have optimized developing process with the latest technology. Then, 15% of field to field CD uniformity improvement and significant improvement of wafer to wafer CD uniformity are achieved.
© (2018) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yuya Kamei, Takahiro Shiozawa, Shinichiro Kawakami, Hideo Shite, Hiroshi Ichinomiya, Yusaku Hashimoto, Masashi Enomoto, Kathleen Nafus, Akihiro Sonoda, Marc Demand, and Philippe Foubert "Resist coating and developing process technology toward EUV manufacturing sub-7nm node", Proc. SPIE 10583, Extreme Ultraviolet (EUV) Lithography IX, 105831V (19 March 2018); https://doi.org/10.1117/12.2297203
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KEYWORDS
Semiconducting wafers

Particles

Critical dimension metrology

Extreme ultraviolet lithography

Extreme ultraviolet

Manufacturing

Photoresist processing

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