As an important measuring method in velocity measuring field, Particle Image Velocimetry(PIV), which follows the principle of dividing the maximum displacement of tracer particles by the corresponding time, is applied more and more widely in various subjects, and the accuracy of which is influenced by the choice of the time delay to some extent. The existing PIV system usually chooses a fixed time delay, which could not meet the need of the application in measuring the vector of time varying flow field with a relatively high measuring accuracy. Considering the weakness of this, we introduce a new kind of adjustable frame-straddling image formation system for PIV application to improve the accuracy in this paper. The image formation system is implemented mainly because of two parts: a dual CCD camera system which is carefully designed to capture the frame-straddling image pairs of the flow field with an adjustable time delay controlled by the externally trigger signals, and an effective subpixel image registration algorithm, which is used to calculate vector of the time varying flow field on the hardware platform, which generates the two channels of trigger signals with the adjustable time delay according to the instantaneous calculating vector of flow field. Experiments were performed for several time varying flows to verify the effectiveness of the image formation system and the results shows that the accuracy was improved in calculating the vector of the flow field based on such image formation system to some extent.
Currently, high-speed vision platforms are widely used in many applications, such as robotics and automation industry. However, a personal computer (PC) whose over-large size is not suitable and applicable in compact systems is an indispensable component for human-computer interaction in traditional high-speed vision platforms. Therefore, this paper develops an embedded real-time and high-speed vision platform, ER-HVP Vision which is able to work completely out of PC. In this new platform, an embedded CPU-based board is designed as substitution for PC and a DSP and FPGA board is developed for implementing image parallel algorithms in FPGA and image sequential algorithms in DSP. Hence, the capability of ER-HVP Vision with size of 320mm x 250mm x 87mm can be presented in more compact condition. Experimental results are also given to indicate that the real-time detection and counting of the moving target at a frame rate of 200 fps at 512 x 512 pixels under the operation of this newly developed vision platform are feasible.
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