Mr. Zhaohan Li Profile

Zhaohan Li

at Jilin Univ

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Proceedings Article | 13 March 2015 Paper

A 12-bit 500KSPS cyclic ADC for CMOS image sensor

Zhaohan Li, Gengyun Wang, Leli Peng, Cheng Ma, Yuchun Chang

Proceedings Volume 9403, 94030K (2015) https://doi.org/10.1117/12.2083269

KEYWORDS: Clocks, Amplifiers, CMOS sensors, Image sensors, Capacitors, Device simulation, Switches, Analog electronics, Image resolution, High dynamic range imaging

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At present, single-slope analog-to-digital convertor (ADC) is widely used in the readout circuits of CMOS image sensor (CIS) while its main drawback is the high demand for the system clock frequency. The more pixels and higher ADC resolution the image sensor system needs, the higher system clock frequency is required. To overcome this problem in high dynamic range CIS system, this paper presents a 12-bit 500-KS/s cyclic ADC, in which the system clock frequency is 5MHz. Therefore, comparing with the system frequency of 2^N×f_S for the single-slope ADC, where f_S, N is the sampling frequency and resolution, respectively, the higher ADC resolution doesn’t need the higher system clock frequency. With 0.18μm CMOS process, the circuit layout is realized and occupies an area of 8μm×374μm. Post simulation results show that Signal-to-Noise-and-Distortion-Ratio (SNDR) and Efficient Number of Bit (ENOB) reaches 63.7dB and 10.3bit, respectively.

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