Mark Notarfrancesco
Process Engineer at Intel Corp
SPIE Involvement:
Author
Publications (1)

Proceedings Article | 26 July 1999 Paper
Mark Notarfrancesco, Paul Herrington, Joseph Pelligrini
Proceedings Volume 3679, (1999) https://doi.org/10.1117/12.354321
KEYWORDS: Semiconducting wafers, Optical alignment, Reticles, Manufacturing, Overlay metrology, Algorithm development, Data modeling, Statistical modeling, Process modeling, Distortion

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