KEYWORDS: Feature extraction, Feature selection, Lithography, Simulation of CCA and DLA aggregates, Machine learning, Manufacturing, Computer programming, Semiconducting wafers, Design for manufacturability, Very large scale integration
As VLSI device feature sizes are getting smaller and smaller, lithography hotspot detection and elimination have become more important to avoid yield loss. Although various machine learning based methods have been proposed, it is not easy to find appropriate parameters to achieve high accuracy. This paper proposes a feature selection method by using the probability distributions of layout features. Our method enables automatic feature optimization and classifier construction. It can be adaptive to different layout patterns with various features. In order to evaluate hotspot detection methods in the situation close to actual problem, dataset based on ICCAD2019 dataset is used for evaluation. Experimental results show the effectiveness of our method and limitations.
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