Paper
8 April 2011 Availability of underlayer application to EUV process
Author Affiliations +
Abstract
EUV lithography is one of the most promising technologies for the fabrication of beyond 30nm HP generation devices. However, it is well-known that EUV lithography still has significant challenges. A great concern is the change of resist material for EUV resist process. EUV resist material formulations will likely change from conventional-type materials. As a result, substrate dependency needs to be understood. TEL has reported that the simulation combined with experiments is a good way to confirm the substrate dependency. In this work the application of HMDS treatment and SiON introduction, as an underlayer, are studied to cause a footing of resist profile. Then, we applied this simulation technique to Samsung EUV process. We will report the benefit of this simulation work and effect of underlayer application. Regarding the etching process, underlayer film introduction could have significant issues because the film that should be etched off increases. For that purpose, thinner films are better for etching. In general, thinner films may have some coating defects. We will report the coating coverage performance and defectivity of ultra thin film coating.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hitoshi Kosugi, Carlos Fonseca, Fumiko Iwao, Hiroshi Marumoto, Hyun-Woo Kim, Kyoungyong Cho, Cheol-Hong Park, Chang-Min Park, Hai-Sub Na, Cha-Won Koh, and Hanku Cho "Availability of underlayer application to EUV process", Proc. SPIE 7969, Extreme Ultraviolet (EUV) Lithography II, 79692E (8 April 2011); https://doi.org/10.1117/12.878730
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KEYWORDS
Coating

Semiconducting wafers

Contamination

Data modeling

Extreme ultraviolet

Calibration

Extreme ultraviolet lithography

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