Paper
12 January 2004 Hardening CMOS imagers: radhard-by-design or radhard-by-foundry
Bedabrata Pain, Bruce R. Hancock, Thomas J. Cunningham, Suresh Seshadri, Chao Sun, Pavani Pedadda, Christopher J. Wrigley, Robert C. Stirbl
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Abstract
A comparative study between radhard-by-design and radhard-by-foundry approaches for radiation hardening of CMOS imagers is presented. Main mechanisms for performance degradation in CMOS imagers in a radiation environment are identified, and key differences between the radiation effects in CMOS imagers and that in digital logic circuits are explained. Design methodologies for implementation of CMOS imagers operating in a radiation environment are presented. By summarizing the performance results obtained from imagers implemented in both radhard-by-design and radhard-by-foundry approaches, the advantages and shortcomings of both approaches are identified. It is shown that neither approach presents an optimum solution. The paper concludes by discussing an alternate pathway to overcome these limitations and enable the next-generation high-performance radiation-hard CMOS imagers.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Bedabrata Pain, Bruce R. Hancock, Thomas J. Cunningham, Suresh Seshadri, Chao Sun, Pavani Pedadda, Christopher J. Wrigley, and Robert C. Stirbl "Hardening CMOS imagers: radhard-by-design or radhard-by-foundry", Proc. SPIE 5167, Focal Plane Arrays for Space Telescopes, (12 January 2004); https://doi.org/10.1117/12.512278
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Cited by 18 scholarly publications.
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KEYWORDS
Imaging systems

Field effect transistors

Oxides

Image processing

Digital electronics

Silicon

Diodes

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