Method to improve the throughput and retain the CD performance for DUV process

Yung-Tsung Hsiao; Ta-Chung Liu; Lee-Jean Chiu; Chih-You Chen; Chin-Yu Ku

doi:10.1117/12.474271

24 July 2002 Method to improve the throughput and retain the CD performance for DUV process

Yung-Tsung Hsiao, Ta-Chung Liu, Lee-Jean Chiu, Chih-You Chen, Chin-Yu Ku

Proceedings Volume 4690, Advances in Resist Technology and Processing XIX; (2002) https://doi.org/10.1117/12.474271
Event: SPIE's 27th Annual International Symposium on Microlithography, 2002, Santa Clara, California, United States

Abstract

One of the major problems for DUV resists is linewidth change owing to Post Exposure Delay (PED) and PEB conditions. In this work, the influence of PED and PEB baking conditions have been investigated based on the measured linewidth, i.e., critical dimension (CD). Our previously established model has been employed to describe the linewidth for various resists and process conditions. Based on our analyzed results, the process flow of wafer can be modified to improve the throughput, and still retain the CD stability and resist profile control.

Citation Download Citation

Yung-Tsung Hsiao, Ta-Chung Liu, Lee-Jean Chiu, Chih-You Chen, and Chin-Yu Ku "Method to improve the throughput and retain the CD performance for DUV process", Proc. SPIE 4690, Advances in Resist Technology and Processing XIX, (24 July 2002); https://doi.org/10.1117/12.474271

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