In this work, the effect of exhaust condition during Post Exposure Bake (PEB) on the critical dimension (CD) performance has been investigated for different DUV resists. Two kinds of PEB chamber cover designs have been tested to see the influence of exhaust flow on CD. It has been found that cleaning and adjusting of PEB exhaust flow will change the resist CD. To confirm the impact of PEB exhaust condition on production, resists for both lines and contact holes are verified by scanning electron microscope (SEM).
During the wafer coating process, photoresist is spun-coated to desired thickness based on the process requirements. The residual resist is spun out of a wafer and partially deposited on the sidewall of the coater cup. The resist will dry out and become small particles. Those small resist particles may deposit on top of the resist film of the next processing wafer. The small particles act as micro-lens and produce distorted or unwanted patterns. In this work, the effect of those dried resist particles on resist patterning has been studied for both binary and PSM masks.
In this work, the effect of delayed time after soft-bake process, which is normally called “Post Coat Delay (PCD)” or “Post Soft-bake Delay (PSD)”, on the critical dimension (CD) performance has been investigated for a DUV resist. The smallest contact hole is always found at the first processing wafer, and the contact size gradually returns to its normal CD value when other wafers are continuously running. The resist cross sections showed that the CD variation is caused by resist footing. We have found that the resist footing might come from the reaction between bottom anti-reflective coating (BARC) and hexamethyl disilazane (HMDS).
One of the major problems for DUV resists is linewidth change owing to Post Exposure Delay (PED) and PEB conditions. In this work, the influence of PED and PEB baking conditions have been investigated based on the measured linewidth, i.e., critical dimension (CD). Our previously established model has been employed to describe the linewidth for various resists and process conditions. Based on our analyzed results, the process flow of wafer can be modified to improve the throughput, and still retain the CD stability and resist profile control.
To obtain good overlay performance, the quality of the wafer marks should be well designed. Although different brands of steppers and scanners use unique mark pattern design and alignment system, these exposure tools determine the position of marks through the signal obtaining from the height difference within the mark region. The largest problem of the marks is that the quality of the marks is influenced by the process conditions, such as film deposition, chemical mechanical polishing, and etching conditions, etc. In this work, we studied the impact of the CMP on the quality of the ASML alignment mark. The film structure and process flow are also investigated to understand the deformation of marks for different clear-out scheme. The lot-to-lot overlay variation can be prevented when the new clear-out scheme is employed.
The reduced depth of focus (DOF) caused by higher numerical aperture (NA) is making the accuracy of best focus measurement increasingly important. A new overlay pattern is developed herein to precisely measure the best focus of lithographic tools. Specially designed 'bar-in-bar' (BIB) was employed to obtain the best focus by using the opposite shifting direction of inner and outer bars when defocused. The inner and outer bars are composed of various pattern sizes. When defocused, the shrinkage of the smaller patterns is more significant than that of the larger patterns, thus causing the center of gravity to shift. The distribution and pattern sizes are optimized to obtain high reproducibility and sensitive position shifting for various defocus conditions. Employing the special BIB pattern, the best focus, tilting and field curvature can be easily measured via the conventional overlay measurement tool. By adding the special BIB to the scribe lanes of the production wafers, the best focus and tilting of the stepper can be obtained when measuring a layer-to- layer overlay shift, and can then be fed back to the stepper as a reference for following processing wafers.
KEYWORDS: Critical dimension metrology, Semiconducting wafers, Automatic control, Process control, Deep ultraviolet, Scanning electron microscopy, Diffusion, Image processing, Signal processing, Control systems
One of the major problems for DUV resists is linewidth change owing to Post Exposure Delay (PED). Linewidth is mainly induced by acid diffusion during exposure and baking. Based on the mechanism of the neutralization of organic base and photo generated acid, a model had been generate din our previous study to describe the linewidth variation for different PED times. The derived equation can calculate the minimum elapse time, which will cause linewidth variation to exceed the specification of a specific CD. This work concludes that the smaller CD received a higher percentage of CD variation under PED for an isolated line pattern. Therefore, the minimum acceptable time for the smallest CD can be obtained based on +/- 10 percent of the nominal CD.
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