SPICE modeling of liquid capacitance in micromachined silicon capillaries

Paul V. Rainey; S. J. Neil Mitchell; Harold S. Gamble

doi:10.1117/12.425334

30 April 2001 SPICE modeling of liquid capacitance in micromachined silicon capillaries

Paul V. Rainey, S. J. Neil Mitchell, Harold S. Gamble

Proceedings Volume 4407, MEMS Design, Fabrication, Characterization, and Packaging; (2001) https://doi.org/10.1117/12.425334
Event: Microelectronic and MEMS Technologies, 2001, Edinburgh, United Kingdom

Abstract

This paper investigates modeling of the conductance of liquid in a microchannel, using SPICE. When more than one liquid is present, conductance monitoring is an effective technique to measure electroosmotic flow rates. In micromachined silicon capillaries, the technique is hampered by the capacitance that exists between the bulk fluid and the silicon substrate, and leakage currents due to the thin insulating oxide layer. A SPICE model is used to simulate conductance waveforms, by using MOS transistors to model the time dependant resistance of the channel. The simulation results are used to determine the capacitance and explain the conductance waveforms measured for micromachined silicon channels.

Citation Download Citation

Paul V. Rainey, S. J. Neil Mitchell, and Harold S. Gamble "SPICE modeling of liquid capacitance in micromachined silicon capillaries", Proc. SPIE 4407, MEMS Design, Fabrication, Characterization, and Packaging, (30 April 2001); https://doi.org/10.1117/12.425334

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