Design and reliability aspects of multilevel metal large-scale power line layouts in ULSI-ICs

Peter J. Jacob; Giovanni Nicoletti

doi:10.1117/12.410074

23 August 2000 Design and reliability aspects of multilevel metal large-scale power line layouts in ULSI-ICs

Peter J. Jacob, Giovanni Nicoletti

Proceedings Volume 4182, Process Control and Diagnostics; (2000) https://doi.org/10.1117/12.410074
Event: Microelectronic Manufacturing, 2000, Santa Clara, CA, United States

Abstract

Integration of both extremely small-dimensioned metal lines and large-dimensioned metal structures may cause reliability problems due to thermomechanical stress between the intermetal dielectric and the multi-level-metalization. The paper reports a case study and shows a problem solution approach: due to thermomechanical mismatch of aluminum and Si-oxide, metalization processing should not be used for both small and large structures. This may cause cracks and generate intermetallic shorts as a reliability problem.

Citation Download Citation

Peter J. Jacob and Giovanni Nicoletti "Design and reliability aspects of multilevel metal large-scale power line layouts in ULSI-ICs", Proc. SPIE 4182, Process Control and Diagnostics, (23 August 2000); https://doi.org/10.1117/12.410074

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