Coupling between hot-carrier degradation modes of pMOSFETs

Vijay Janapaty; Bharat L. Bhuva; N. Bui; Sherra E. Kerns

doi:10.1117/12.284695

11 September 1997 Coupling between hot-carrier degradation modes of pMOSFETs

Vijay Janapaty, Bharat L. Bhuva, N. Bui, Sherra E. Kerns

Proceedings Volume 3216, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III; (1997) https://doi.org/10.1117/12.284695
Event: Microelectronic Manufacturing, 1997, Austin, TX, United States

Abstract

The hot-carrier degradation of pMOSFETs is affected by the sequence of bias conditions. Device parameter shifts under dynamic stresses can be different from those determined from DC stressing experiments. In particular, hole injection is enhanced when preceded by electron trapping, though subsequent electron trapping is not affected by hole injection. Sequences of electron trapping preceding hole injection and hole injection preceding electron trapping both enhance the rate of interface trap formation relative to that seen in single-bias, e.g. single-mode or DC, stressing experiments.

Citation Download Citation

Vijay Janapaty, Bharat L. Bhuva, N. Bui, and Sherra E. Kerns "Coupling between hot-carrier degradation modes of pMOSFETs", Proc. SPIE 3216, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III, (11 September 1997); https://doi.org/10.1117/12.284695

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