Paper
14 November 2007 Implementation of large kernel 2-D convolution in limited FPGA resource
Sheng Zhong, Yang Li, Luxin Yan, Tianxu Zhang, Zhiguo Cao
Author Affiliations +
Proceedings Volume 6789, MIPPR 2007: Medical Imaging, Parallel Processing of Images, and Optimization Techniques; 67892N (2007) https://doi.org/10.1117/12.750052
Event: International Symposium on Multispectral Image Processing and Pattern Recognition, 2007, Wuhan, China
Abstract
2-D Convolution is a simple mathematical operation which is fundamental to many common image processing operators. Using FPGA to implement the convolver can greatly reduce the DSP's heavy burden in signal processing. But with the limit resource the FPGA can implement a convolver with small 2-D kernel. In this paper, An FIFO type line delayer is presented to serve as the data buffer for convolution to reduce the data fetching operation. A finite state machine is applied to control the reuse of multipliers and adders arrays. With these two techniques, a resource limited FPGA can be used to implement a larger kernel convolver which is commonly used in image process systems.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Sheng Zhong, Yang Li, Luxin Yan, Tianxu Zhang, and Zhiguo Cao "Implementation of large kernel 2-D convolution in limited FPGA resource", Proc. SPIE 6789, MIPPR 2007: Medical Imaging, Parallel Processing of Images, and Optimization Techniques, 67892N (14 November 2007); https://doi.org/10.1117/12.750052
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Cited by 2 scholarly publications and 1 patent.
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KEYWORDS
Convolution

Field programmable gate arrays

Clocks

Digital signal processing

Image processing

Medical imaging

Signal processing

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