KEYWORDS: Network architectures, System on a chip, Control systems, Computing systems, Copper, Computer architecture, Logic, Data storage, Very large scale integration, Networks
To meet the demand for higher performance, flexibility, and economy in today's state-of-the-art networks, great emphasis is placed on unconventional hardware architectures of network processors. This paper analyzes the problem of processor internal resource and traffic management and proposes a programmable scheduler architecture implemented in a novel protocol processor that deals with the above problems in an integrated way. We briefly outline the architecture of the protocol processor and we support that the innovative scheduling scheme integrated in PRO3 is, in general, crucial for network Systems-on-Chip since it makes it feasible to use scheduler's architecture are discussed that lead to efficient integration of the component to different network processor architectures at a similar cost. Its beneficial features are easy hardware implementation, low memory bandwidth requirements and high flexibility so as to support multiple service disciplines in a programmable way, thousands of flows and even perform different scheduling tasks.
An important element in the performance of the Medium Access and Control (MAC) layer of Hybrid Fiber Coax (HFC) systems are the medium access mechanisms employed: e.g. requests via contention mini-slots, piggybacking requests, request poling, etc. Therefore, the starting point in the design of the MAC of ATM cell based HFC systems, is an evaluation of the candidate mechanisms, which is presented in this paper. Furthermore, it is shown that different traffic types need different ideal MAC mechanisms, or different ideal combinations of them. Several proposals will be given for different traffic classes, and while in standardization and early deployment a lot of attention goes to Internet traffic today, this paper will consider in addition also the very different traffic of ATM terminals, which is rate controlled according to the ATM traffic characteristics.
Demand for inter-activity drives the massive introduction of a return channel in CATV systems by means of the HFC architecture. Cost-effectiveness dictates sharing this return channel among many customers and the most suitable method is TDMA which can accommodate the high burstiness of the upstream traffic. The MAC protocol arbitrating the access to the time slots combines more than one access mechanisms but reservation ALOHA is the most promising method for the identification of busy stations. In this work a novel method allowing simultaneous reservations without previous symbol synchronization is presented. The simultaneous single symbol reservation (S3R) scheme greatly reduces the overhead for reservation sub-slots but also allows better and more predictable performance improving system utilization.
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