Sung Ho Choi, Yi Tae Kim, Min Seok Oh, Young Hwan Park, Jeong Jin Cho, Young Heub Jang, Hyung Jun Han, Jong Won Choi, Ho Woo Park, Sang Il Jung, Hoon Sang Oh, Jung Chak Ahn, Hiroshige Goto, Chi Young Choi, Yonghan Roh
New isolation scheme for CMOS image sensor pixel is proposed and its improved dark current performance is reported.
It is well known that shallow trench isolation (STI) is one of major sources of dark current in imager pixel due to the
existence of interfacial defects at STI/Si interface. On the account STI-free structure over the whole pixel area was
previously reported for reducing dark current. As the size of pixel pitch is shrunk, however, it becomes increasingly
difficult to isolate in-pixel transistors electrically without STI. In this work, we implemented hybrid type isolation
scheme of removing STI around photodiode to suppress the dark current and remaining STI near transistors to guarantee
the electrical isolation of transistors in pixel. It was successfully achieved that the dark current was significantly reduced
by removing the STI around the photodiode together with normal operation of in-pixel transistors.
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