The spatially resolved electrical response of polycrystalline NiOx films, composed of 40 nm crystallites, was investigated under different relative humidity (RH) levels. The topological and electrical properties (surface potential and resistance) were characterized with sub-25-nm resolution using Kelvin probe force microscopy and conductive scanning probe microscopy under argon atmosphere with 0%, 50%, and 80% RH. The dimensionality of surface features obtained through autocorrelation analysis of topological maps increased linearly with increased RH, as water was adsorbed onto the film surface. Surface potential decreased from 280 to 100 mV and resistance decreased from 5 GΩ to 3 GΩ, in a nonlinear fashion when RH was increased from 0% to 80%. Spatially resolved surface potential and resistance of the NiOx films was found to be heterogeneous throughout the film, with distinct surface features that grew in size from 60 to 175 nm at 0% and 80% RH levels, respectively. The heterogeneous character of the topological, surface potential, and resistance properties of the polycrystalline NiOx film observed under dry conditions decreased with increased RH, yielding nearly homogeneous surface properties at 80% RH, suggesting that the nanoscale potential and resistance properties converge with the mesoscale properties as water is adsorbed onto the NiOx film.
The spatially resolved electrical response of polycrystalline NiO films composed of 40 nm crystallites was investigated under different relative humidity levels (RH). The topological and electrical properties (surface potential and resistance) were characterized with sub 25nm resolution using Kelvin probe force microscopy (KPFM) and conductive scanning probe microscopy under argon atmosphere at 0%, 50%, and 80% relative humidity. The dimensionality of surface features obtained through autocorrelation analysis of topological maps increased linearly with increased relative humidity, as water was adsorbed onto the film surface. Surface potential decreased from about 280mV to about 100 mV and resistance decreased from about 5 GΩ to about 3 GΩ, in a nonlinear fashion when relative humidity was increased from 0% to 80%. Spatially resolved surface potential and resistance of the NiO films was found to be heterogeneous throughout the film, with distinct domains that grew in size from about 60 nm to 175 nm at 0% and 80% RH levels, respectively. The heterogeneous character of the topological, surface potential, and resistance properties of the polycrystalline NiO film observed under dry conditions decreased with increased relative humidity, yielding nearly homogeneous surface properties at 80% RH, suggesting that the nanoscale potential and resistance properties converge with the mesoscale properties as water is adsorbed onto the NiO film.
We report on the fabrication and characterization of SiO2 thin films by high-density plasma enhanced chemical vapor deposition (HD-PECVD) technique at a processing temperature lower than 400°C for gate dielectric applications in thin film transistor (TFT) devices. An inductively coupled plasma source was used to couple the rf power to the top electrode. The SiO2 thin films were fabricated on p-Si wafers using nitrogen, nitrous oxide, and silane precursors. The deposition process was optimized in terms of the effects of rf power, gas flow rates, and system pressure on deposition rate, chemical etch rate, optical properties, and electrical characteristics. The effects of the processing variables on the refractive index, Si-O bond formation, and impurity related bonds were analyzed. The electrical properties of the films were evaluated from the I-V and C-V characteristics of the MOS capacitors. The effects of the SiO2 film thickness on the electrical characteristics of MOS capacitors were also investigated in the range of 30-100 nm. The influence of the low temperature processed gate dielectric on the performance of 500 Å poly-Si TFTs was evaluated in terms of the transfer and gate leakage characteristics. The microstructural and electrical characteristics of the HD-PECVD deposited SiO2 thin films suggest their suitability for the low temperature integration of TFTs on glass or other low temperature substrates.
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