KEYWORDS: Scanning electron microscopy, Electron beams, Semiconducting wafers, Silicon, Metrology, Critical dimension metrology, Process control, Time metrology, Oxides, Signal processing
The influence of sample charging in CD measurements by a SEM based metrology system has been continuously decreased through lower electron beam landing energy, lower electron dose (a combination of lower beam current and less integration time) and faster scan speed. However, as IC industry marches towards 100 nm gate width, the demand for less than 1 nm precision CD- SEM grows. Charging continues to be the one of the biggest hurdles to reach that goal. Additional charge control measures are needed. We propose an approach to utilize extraction voltage in charge control. When varying extraction voltage strength, a CD-SEM can be tuned (through the combination of beam energy and extraction voltage) to operate at energy of balancing the total injected charge and the total emitted charge for a specific substrate. The preliminary experiment results support such a proposal.
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