This paper introduces an 80x80 microbolometer array with a 35 μm pixel pitch operating in the 8-12 μm wavelength range, where the detector is fabricated with the LWIR-band CMOS infrared technology, shortly named as CIR, which is a novel microbolometer implementation technique developed to reduce the detector cost in order to enable the use of microbolometer type sensors in high volume markets, such as the consumer market and IoT. Unlike the widely used conventional surface micromachined microbolometer approaches, MikroSens’ CIR detector technology does not require the use of special high TCR materials like VOx or a-Si, instead, it allows to implement microbolometers with standard CMOS layers, where the suspended bulk micromachined structure is obtained by only few consecutive selective MEMS etching steps while protecting the wirebond pads with a simple lithograpy step. This approach not only reduces the fabrication cost but also increases the production yield. In addition, needing simple subtractive post-CMOS fabrication steps allows the CIR technology to be carried out in any CMOS and MEMS foundry in a truly fabless fashion, where industrially mature and Au-free wafer level vacuum packaging technologies can also be carried out, leading to cost advantage, simplicity, scalability, and flexibility. The CIR approach is used to implement an 80x80 FPA with 35 μm pixel pitch, namely MS0835A, using a 0.18 μm CMOS process. The fabricated sensor is measured to provide NETD (Noise Equivalent Temperature Difference) value of 163 mK at 17 fps (frames per second) and 71 mK at 4 fps with F/1.0 optics in a dewar environment. The measurement results of the wafer level vacuum packaged sensors with one side AR coating shows an NETD values of 112 mK at 4 fps with F/1.1 optics, i.e., demonstrates a good performance for high volume low-cost applications like advanced presence detection and human counting applications. The CIR approach of MikroSens is scalable and can be used to reduce the pixel pitch even further while increasing the array size if necessary for various other low-cost, high volume applications.
This paper presents the development of advanced presence detection system using the CMOS infrared (CIR) technology. The recent advancements on microbolometer type uncooled LWIR imaging sensor technology allowed to reduce the fabrication cost of the microbolometer type detectors and the overall wafer cost and therefore to increase the use of this technology in a number of emerging applications, including various consumer applications and advance presence detection systems for smart buildings and smart offices. Such applications require even lower cost detectors, which can be achieved with a recently introduced CMOS infrared (CIR) technology that enables the mass fabrication of microbolometer type sensors in almost any CMOS foundries without additional equipment investment. This paper introduces an advanced presence detection system which uses an LWIR microbolometer type sensor fabricated using the CIR technology. The advanced presence detection (APD) system can provide 80x80 infrared video together with the temperature map of the scene where the sensor can collect LWIR radiation using 120 degrees wide FOV lens. The embedded microprocessor can process the infrared video and provide real time number of people data as output. The APD system can both provide SPI interface for OEM developers and USB interface for fast evaluation and prototyping.
This paper presents the development of a miniature LWIR thermal camera, MSE070D, which targets value performance infrared imaging applications, where a 160x120 CMOS-based microbolometer FPA is utilized. MSE070D features a universal USB interface that can communicate with computers and some particular mobile devices in the market. In addition, it offers high flexibility and mobility with the help of its USB powered nature, eliminating the need for any external power source, thanks to its low-power requirement option. MSE070D provides thermal imaging with its 1.65 inch3 volume with the use of a vacuum packaged CMOS-based microbolometer type thermal sensor MS1670A-VP, achieving moderate performance with a very low production cost. MSE070D allows 30 fps thermal video imaging with the 160x120 FPA size while resulting in an NETD lower than 350 mK with f/1 optics. It is possible to obtain test electronics and software, miniature camera cores, complete Application Programming Interfaces (APIs) and relevant documentation with MSE070D, as MikroSens want to help its customers to evaluate its products and to ensure quick time-to-market for systems manufacturers.
This paper presents the performance evaluation of a unique method called heating based resistance nonuniformity
compensation (HB-RNUC). The HB-RNUC method utilizes a configurable bias heating duration for each pixel in order
to minimize the readout integrated circuit (ROIC) output voltage distribution range. The outputs of each individual pixel
in a resistive type microbolometer differ from each other by a certain amount due to the resistance non-uniformity
throughout the focal plane array (FPA), which is an inevitable result of the microfabrication process. This output
distribution consumes a considerable portion of the available voltage headroom of the ROIC unless compensated
properly. The conventional compensation method is using on-chip DACs to apply specific bias voltages to each pixel
such that the output distribution is confined around a certain point. However, on-chip DACs typically occupy large
silicon area, increase the output noise, and consume high power. The HB-RNUC method proposes modifying the
resistances of the pixels instead of the bias voltages, and this task can be accomplished by very simple circuit blocks.
The simplicity of the required blocks allows utilizing a low power, low noise, and high resolution resistance nonuniformity
compensation operation. A 9-bit HB-RNUC structure has been designed, fabricated, and tested on a 384x288
microbolometer FPA ROIC on which 35μm pixel size detectors are monolithically implemented, in order to evaluate its
performance. The compensation operation reduces the standard deviation of the ROIC output distribution from 470 mV
to 9 mV under the same readout gain and bias settings. The analog heating channels of the HB-RNUC block dissipate
around 4.1 mW electrical power in this condition, and the increase in the output noise due to these blocks is lower than
10%.
This paper introduces a detector biasing scheme proper for resistive microbolometer type uncooled thermal detector focal
plane arrays (FPAs). The proposed scheme utilizes a 2-stage digital-to-analog converter (DAC) architecture where the first
DAC stage generates the voltage interval that covers the bias voltage range of the overall FPA, while the second stage
generates the high resolution analog voltages that are used to apply pixel-specific bias voltages. The second DAC stage
output includes a resistive ladder type multi-level voltage generator (MLVG), which can be shared by multiple column
readouts. The proposed scheme utilizes a single first stage DAC and a number of second stage DACs that can be optimized
to meet the specifications of the application. The proposed scheme provides high resolution bias correction with small
silicon area coverage, low power dissipation, and low noise. Furthermore, this scheme is suitable for microbolometer FPAs
with very different detector resistance ranges, since the bias correction voltage interval is adjustable by the first DAC stage.
The proposed architecture is used to design a 5+5 bit, 2-stage DAC that can be used in a 640x480 microbolometer FPA
where a standard 0.35 μm CMOS process is considered. The simulation results show that the circuit provides a detector
current resolution of 130 nA when the architecture is optimized to cover a 80 kΩ nominal detector resistance with ±10%
resistance nonuniformity. The designed circuit dissipates 7.5 mW with a single 5 V supply, and the noise contribution to
the detector current is 30 pA for a 10 kHz electrical bandwidth.
This paper proposes a new method to suppress the bias heating effect of the resistive uncooled microbolometer detectors.
The bias heating effect especially limits the performance where long integration time and large detector bias voltages are
required. The proposed method uses a number of reference detectors for each column of the FPA where the reference
detectors have an optimized thermal conductance and are covered by an infrared reflecting material in order to achieve
high infrared blindness. The heating and cooling durations of the reference detectors are optimized so that the heating
characteristic and the stabilized temperature of the reference detectors are similar to those of the active detectors.
Additionally, a resistance mismatch between the reference detectors and the active detectors is introduced in order to
match the thermal characteristics and to obtain maximum bias heating cancellation. This intentional mismatch is
compensated with a series-connected CMOS resistor to keep the balance in the CTIA circuit. The simulation results
show that it is possible to cancel 97.6% of the resistance change due to bias heating with the use of this method, making
it possible to increase the gain of the column readout by a factor of about 41.
This paper presents a column-based, two-stage, 12-bit analog-to-digital converter structure designed for uncooled
microbolometer arrays. On-chip analog-to-digital converters prevent the degradation of sensitive analog output by
external noise sources as well as providing a more integrated functionality. Despite these advantages, the area and power
constraints limit the usage of high performance converters. This paper presents a new structure that provides a balance
between area, power, and performance. The structure is composed of two stages: a tracking ADC stage running at each
column during integration and a successive approximation ADC stage which is shared by a number of columns
depending on the array size and operation frequency. The tracking ADC operates during the integration time, while the
second ADC starts after the integration is completed. The converter includes self-calibration to lower the effect of
process variations and digital correction mechanisms to eliminate the need for low-offset comparators. The simulations
and theoretical calculations based on the simulation results show that the total power dissipation of the proposed
structure will be approximately 73.7 mW and 88.4 mW on a 320x240 array operating at 60 Hz and 384x288 array
operating at 50 Hz, respectively.
KEYWORDS: Staring arrays, Capacitance, Multiplexing, Sensors, Microbolometers, Switches, Digital electronics, Temperature metrology, Signal processing, Metals
This paper presents a new, low power readout circuit approach for uncooled resistive microbolometer FPAs. The
readout circuits of the microbolometer detectors contain parallel readout channels whose outputs are driven and
multiplexed on large bus capacitances in order to form the output of the readout circuit. High number of opamps used in
the readout channel array and large output capacitances that these opamps should drive necessitates the use of high
output current capacity structures, which results in large power dissipation. This paper proposes two new methods in
order to decrease the power dissipation of the readout circuits for uncooled thermal FPAs. The first method is called the
readout channel group concept, where the readout channel array is separated into groups in order to decrease the load
capacitance seen by the readout channel output. The second method utilizes a special opamp architecture where the
output current driving capacity can be digitally controlled. This method enables efficient use of power by activating the
high output current driving capacity only during the output multiplexing. The simulations show that using these
methods results in a power dissipation reduction of 80% and 91% for the readout channels optimized for a single output
384x288 FPA operating at 25 fps and for a two-output 640x480 FPA operating at 30 fps, respectively.
This paper introduces an optimum reference detector design for uncooled resistive microbolometer focal plane arrays
(FPAs). Reference detectors are mainly used for canceling the bias heating and for decreasing the ambient temperature
dependence of the system. The proposed method in this paper determines an optimum thermal conductance value for the
reference detector such that it is almost infrared blind, but still has the same bias heating characteristics as the active
microbolometer detector. Infrared blindness of the reference detector is further increased by covering the top of the
detector with an infrared reflective material. An optimum number of reference detectors are determined such that the
over-heating of the reference detectors is prevented. Simulation results show that, with the use of the proposed method,
it is possible to compensate the resistance change due to bias heating by 87% for the specific case where the detector has
60 kΩ resistance biased at 2 V, 10 ms thermal time constant, and 0.5x10-7 W/K thermal conductance.
This paper proposes a new resistance non-uniformity correction method for microbolometer-type uncooled thermal
detector focal plane arrays (FPAs) that suffer from pixel-to-pixel resistance variation, which is conventionally corrected
by applying a specific bias voltage to each detector by the use on-chip DACs. The proposed method uses the heating of
the detector with electrical bias, where the detector is heated-up for a pre-determined period of time before the read-out
phase. The proposed method uses only a heat-up signal source and simple digital blocks for each column, eliminating
the need for DACs that occupy large area, contribute to the noise floor of the system, and dissipate extra power. The
proposed method provides a detector current resolution of 14.5 nA with 9-bit digital data, which corresponds to the
resolution of 12-bit DAC used in conventional methods.
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