Gallium nitride (GaN) ultraviolet (UV) laser diodes (LDs) show tremendous promise for optical communications, data storage, and medical applications due to their compact size and higher efficiency compared to gas lasers. Typically, GaN UV LDs utilize a symmetric waveguide structure surrounding a multiple quantum well (MQW) active region for optical confinement. By increasing the thickness of these waveguides, device performance can be enhanced by reducing absorption losses. However, thin waveguides offer decreased carrier losses and improved electrical performance. These two competing effects can be balanced through the use of an asymmetric waveguide structure, composed of a thin upper waveguide and thick lower waveguide, in order to minimize both carrier (hole) losses as well as optical losses. Here, we demonstrated an edge-emitting ridge waveguide UV GaN LD emitting at ~392 nm. Mirror facets were fabricated through reactive ion etch and potassium hydroxide wet etch. These LD structures with InGaN/GaN MQWs and AlGaN cladding layers were grown via metalorganic chemical vapor deposition on a patterned sapphire substrate and utilize an asymmetric 100 nm thick upper unintentionally doped GaN (uGaN) waveguide and 500 nm thick lower uGaN waveguide structure. We have successfully demonstrated a LD device with 1000 μm cavity length with a lasing threshold of 2.2 A, and 111.8 mW per facet peak optical output power with a differential efficiency of 3%. This demonstration paves the way for GaN LDs with improved differential efficiency at high current densities through the use of optimized asymmetric waveguide structures.
Surface properties are important for structures such as micropillars and nanowires, which are critical for emerging devices including μLEDs, nano-lasers, and vertical power transistors due to increased surface to volume ratios. Fabrication of III-Nitride micropillars can be realized through a top-down approach, where structures are defined through lithography and reactive ion etching (RIE). While effective at forming these micropillar structures, RIE etching leaves behind roughened, non-vertical sidewalls. This surface damage increases non-radiative recombination, forms current leakage paths, and can severely degrade device performance. However, damage can be removed through a follow-up wet etch in potassium hydroxide (KOH) solution. KOH acts as a crystallographic etchant, preferentially exposing vertical <1-100> m-planes, producing smooth, vertical sidewalls. Here, we investigate KOH wet etch passivation for 2.5 μm diameter top-down fabricated GaN micropillars utilizing different temperatures and solution concentrations, and the effects of a Ni etch mask present during wet etching. We observed an average etch rate of 11.67 nm/min for micropillars etched in 60% AZ400k solution compared to 9.44 nm/min for micropillars etched in 20% AZ400k solution, both at a temperature of 80°C. At a constant 40% AZ400k concentration, an average etch rate of 14.39 nm/min for micropillars etched at 90°C are observed compared to 9.89 nm/min for micropillars etched at 70°C. Micropillars with a Ni etch mask present during KOH etching have an average etch rate of 9.46 nm/min compared to 12.83 nm/min for those without a Ni mask. The effects of KOH etching work to further optimize the performance of GaN-based micropillar and nanowire devices.
Micro-Light-Emitting Diode (μLED) displays have seen increasing interest over the past decade due to their promising advantages over other display technologies, especially in applications requiring extremely high resolutions such as virtual and alternate reality headsets. Most modern full-color μLED displays rely on red, green, and blue (RGB) pixels based on different material systems combined together on a thin-film transistor back panel, which is often costly and has poor yield. An alternative approach is to create a monolithic display in the GaN/InGaN material system, capable of covering the entire visible spectrum through tuning of quantum well (QW) Indium content or phosphor down conversion. However, monolithic GaN displays present the issue of pixel isolation, as the lack of truly insulating undoped GaN (u-GaN) makes it difficult to electrically isolate rows or columns of μLEDs from one another. In this work, we demonstrate a novel solution to this issue which utilizes photoresist to fill deep trench isolation features, enabling interconnection of μLED p-contacts in a single-color passive matrix display. A photoresist layer is used to fill deep trenches isolating columns of μLEDs from one another. This photoresist layer is patterned and baked at 250 °C for 30 minutes, crosslinking it and making it extremely durable. This process allows for formation of p-interconnects using liftoff, and avoids the issues involved in bridging high aspect ratio trenches. This photoresist planarized trench isolation process could contribute to creation of improved monolithic full color μLED displays which require multiple deep isolation features to be bridged by conductive interconnects.
Nanowire array LEDs rely on an interlayer spacer dielectric to enable connection of many nanowires in parallel. Conventional solutions use spin-coatable materials such as polydimethylsiloxane (PDMS) or spin-on-glass (SOG), which are thermally and mechanically unstable. Alternatively, more stable dielectric materials such as SiO2 or Si3N4 can be used, however these materials deposit conformally, leading to significant surface topology above the nanowires prior to the etch back step. In this work, we present a method for removing this surface topology by utilizing a self-planarizing photoresist layer and a plasma etch which removes photoresist and SiO2 at the same rate. By performing this planarization process several times, surface features of height h > 1 μm can be reduced to less than 50 nm, allowing further etching of the SiO2 to expose the tips the nanowires and allow for reliable p-contact formation. Unlike CMP, this process only involves dielectric deposition and dry etching, and places no limitations on sample size and shape, making it ideal for research settings.
AlGaN light emitting diodes (LEDs) emitting in the deep ultraviolet (DUV) range typically suffer from poor light extraction efficiency (LEE). In this study, we determine the effects of nanostructure height, diameter, and emission wavelength on LEE. Changes to device morphology influencing surface to volume ratio (SVR) are studied in order to optimize device dimensions to maximize LEE. Simulations show improvements in LEE of up to 300% and 60% for structures with increased height and decreased diameter respectively, which is predicted for higher SVR structures. These results shows that engineering of nanostructure SVR could be used to improve DUV LED efficiency.
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