Precision control of critical dimensions (CD) in modern photomask manufacturing is conventionally accomplished by measuring of CD check patterns allocated inside photomask area. Recently, due to use of immersion and High-NA processes for ArF scanners surface of photomask is subjected to higher energy exposure. Such high energy exposure not only increases the loading effect and the flare but also brings about additional issues such as Cr migration and degradation of MoSi film quality due to its surface oxidation which become a new source of CD deviation. Such phenomenon influence both local pattern shape and its dependence on pattern density and global pattern density and arrangement. To achieve good control of CD in such global environment it is required to measure patterns in the chip device area equivalent to CD check patterns allocated on that chip. However, it is extremely difficult to accurately extract coordinates of patterns for CD measurements inside large device of the chip. We have developed a system in which firstly, using design rule check (DRC) method we extract from the chip device area simple line and space (L/S) patterns similar to CD check patterns and secondly, after bitmap transformation of the extraction result use a convolution operation approach to determine the patterns to measure. We confirmed that our method enables selection of CD measurement points with good reproducibility and stability. Next, we report on details of our method to extract CD measurement points and demonstrate its usefulness due to its excellent reproducibility and stability.
For accurate analysis of circuit performance, an understanding on-chip gate length variation is required. Non-systematic
OCLV was measured by SEM and the results were analyzed after being divided into local and global factors. Simple
empirical models of global and local variations were proposed, and fitting was done. In the fitting, measured mask
variation was used, and on-chip variation of focus, dose, and LWR were fitting parameters. The fit of our model was
very consistent with experimental result. Prediction of global and local variation using lithographic characters of
patterns, such as EL, DOF, and MEEF, was enabled.
Advanced process control (APC) of photomask dry-etching has been studied for strict mean control of both CD and phase angle of phase shift masks (PSMs). Equations to correlate process information with actual etching results have been developed for this purpose. It is showed that plasma reactance measured with RF sensor has noticeable correlation with Cr etching bias, which is affected by Cr load and condition of etching chamber. Simulation of etching bias based on plasma reactance shows the good agreement with the trend of actual etching results. Expectation of process capability index (Cpk) for mean-to-target (MTT) within 5.2nm is about 1.27, corresponding to CD yield more than 99.9%. In case of MoSi based PSMs, monitoring the sensor outputs is also useful to simulate the etching rate of phase shifter. One simple relationship can be also derived as the case of Cr etching bias. Expected phase error is within 1.5degree in almost cases. In actual photomask fabrication, maintenance of the equation for APC is a critical issue to guarantee the high process yield for a long period. It is showed that trend of the plasma reactance gives the meaningful information effective in automatic maintenance of the equations. As a conclusion, it is proved that our APC method is one of the answers to give the highest MTT yield for both CD and phase angle.
This paper presents about 65 nm-node alternating phase shift mask (APSM) fabrication. One of issue in fabrication of 65 nm-node APSM is second layer patterning process. As chromium (Cr) pattern CD becomes narrow, tighter edge placement accuracy of second layer resist pattern is required. Therefore higher total overlay accuracy is required in second layer patterning process. To solve this issue, we examined application of 50kV electron beam (EB) vector writing system and chemically amplified resist (CAR) process.
Error factors which affect total overlay accuracy were quantified experimentally, and minimum required resist coverage through the shifter etching process was determined. From these results, it was confirmed a second layer patterning process using 50kV EB vector writing system and CAR process had enough performance for 65 nm-node APSM fabrication.
In this report, origins of CD error caused through Cr dry etching were investigated and some process conditions were evaluated for the advanced reticle productions. It is shown that resist patterns of ZEP-7000 written with MEBES-4500 showed a little CD deviation between the sparse and dense regions. These errors could be easily emphasized after Cr dry etching. Some dry etching conditions were examined and improvements were confirmed after the addition of etching assist gas and adequate intensity of AC magnetic field of MERIE (Magnetically Enhanced Reactive Ion Etching) system. It is also shown that resist profiles after development play important role in the CD distribution after dry etching for the reticle contained both sparse and dense region on the same plate. With our conventional condition, resist profile of ZEP-7000 showed a gentle slope after development. It is proved that this lower pattern contrast makes the Cr CD difference due to pattern loading much worse. Minimum CD error could be obtained through the process that made resist profile almost vertical. These results imply that total adjustments, not only for dry etching conditions but also for resist process that gives us the highest pattern contrast, are needed to solve the complex issues for the advanced CD control.
Process optimizations have been done to produce 'Fine Pattern' reticles whose minimum target sizes are under 720 nm. 'Zero Bias' process for binary Cr reticles can be achieved with our dry etching process using ZEP-7000 blanks. MEBES-4500 exposure on resist films of 300 nm and dry etching with Magnetic Enhanced Reactive Ion Etching (MERIE) system are adopted. It is shown that adjusted develop condition weakens thinning effect of resist in sub-micron area due to proximity effect of exposure, and MERIE system with Gas Assist Etching (GAE) also improves pattern resolution. CD shift due to 'Loading Effect' is small and resist patterns are perfectly printed as Cr pattern with negligible deterioration of CD linearity. Much improved CD distribution in the area of 132 mm square can be obtained. In production of MoSiON-based attenuated-PSM (Att- PSM), CD shifts between Cr and MoSiON except OPC patterns (such as serif and scattering-bar) can be estimated about 30 nm. It is also shown that there are few defects after dry etching, and 'Zero Defect' reticles are obtained in most cases. Through the all results, validity and probability of our process to produce 'Fine Pattern Reticles' near the half- micron are discussed.
The budget of reticle pattern placement error, using variable-shaped step and repeat electron beam writer has been studied. There are three major factors in the reticle writing process, the stage moving accuracy, the electron beam deflection accuracy and the charge-up of dielectric layers such as resist on the blanks. The charge-up of the blank surface causes the distortion error in the deflection field and the butting error surrounding exposure fields boundary. Moreover, the charge-up of the substrate strongly depends on the amount of the incident electron beam which penetrate the blank surface. Moreover, the charge-up of the blank surface causes registration error in the phase-shift mask manufacturing process. Because the alignment mark used to be exposed by the electron beam whose damage was more than that of pattern writing. In this paper, we report on the result with a variable-shaped step and repeat electron beam reticle writer focusing on the influence of the pattern density which effects a change in the charge-up of the blank surface and on the impact of overlay error in the second exposure process. In addition, we describe placement accuracy by applying electron conductive layer to the blank surface.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.