This work presents a process optimization study of 18nm metal pitch (MP) semi-damascene interconnects with fully self-aligned Vias (FSAV) using SEMulator3D® virtual fabrication coupled with silicon data. Simulation was used to early identify process failures and avoid via opens found on silicon, and to ensure process manufacturability. A full predictive virtual model was calibrated against silicon data to predict the complete process flow from the M2 module to the via module. A process sensitivity analysis was performed to simulate process variability impact on via resistance performance. The simulation identified process parameters and corresponding process windows that need to be controlled to avoid via opens and ensure process manufacturability.
KEYWORDS: Resistance, Capacitance, Ruthenium, Process control, Metals, Critical dimension metrology, Etching, Monte Carlo methods, Oxides, Process modeling
In this work, process modeling was coupled with actual Si data to perform process optimization and control of an 18nm metal pitch (MP18) semi-damascene flow with fully self-aligned vias (FSAV). We explored the impact of process variations and patterning sensitivities on line and via resistances as well as on line capacitance variability. We also benchmarked capacitance variability using partial-airgap and gap fill options. From this study, we have identified significant process parameters and corresponding process windows that need to be controlled to ensure successful manufacturability of the MP18 semi-damascene flow.
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