Eric Bernier, Hamid Mehrvar, Mohammad Kiaei, Huixiao Ma, Xiaoling Yang, Yan Wang, Shuaibing Li, Alan Graves, Dawei Wang, H. Fu, Dongyu Geng, Dominic Goodwill
We provide an alternative architecture for the next generation datacenters by employing electronic and photonic
switching cores. The capacity of electronic packet switching (EPS) cores is not enough for the bandwidth requirements
of next generation datacenters. On the other hand, it is prohibitively costly to build pure photonic packet switching
(OPS) core which is capable of switching native Ethernet frames in nanoseconds. We propose a low-cost hybrid
OPS/EPS platform which significantly increases the switching capacity of datacenters for all traffic patterns while using
the existing EPS cores. Our proposed architecture is a fat-tree hierarchy consisting of servers, top-of-racks (TOR),
aggregation switches, and core switches. The aggregation switches are interconnected to the core hybrid OPS/EPS
switch. Since the traffic inside datacenters is typically bimodal, the hybrid switch core becomes feasible by switching
short and long packets using EPS and OPS cores, respectively. In order to prepare long packets for photonic switching,
they undergo packet contention resolution, compression, and bitwise scrambling. Afterwards, a photonic destination
label is added to the long packets, and they are sent out through an optical transmitter. For compressing the long packets,
the clock rate is raised on the output of the physical layer. Packet compression increases inter-packet gap to insert the
photonic label. Also, it provides more time for photonic switch connection set-up and receiver synchronization at the
destination aggregation switch. We developed a test bed for our architecture and used it to transmit real-time traffic. Our
experiments show successful transmission of all packets through OPS.
The 2x2 optical switch is a crucial component to the future of optical communications and integrated optics. Optical switches on the silicon-on-insulator (SOI) platform have shown advantages in terms of device footprint and switching speed. However, due to the intrinsic properties of SOI rib waveguides, these devices suffer from a strong wavelength and polarization dependent response. Our work presents an SOI based Mach-Zehnder interferometer (MZI) switch which is both polarization and wavelength insensitive over a large bandwidth of
1260-1360 nm. We have completed detailed analyses on the polarization and wavelength performance of the
MZI, and obtained optimized parameters in a novel design to reduce the crosstalk f or transverse electric (TE) and transverse magnetic (TM) modes over the wavelength range 1260-1360 nm. Our simulations suggest that we successfully obtained a polarization and wavelength insensitive MZI. A crosstalk level below -18 dB is achieved for both the TE and TM modes in the on-state and the off-state, across the 100 nm bandwidth. Such a polarization and wavelength insensitive switch has a variety of applications in wavelength division multiplexing and other communication systems.
Board to board free-space optical interconnects can deliver high bandwidth with no physical contact but suffer from poor tolerances to misalignment. In order to obtain high misalignment tolerances, we propose the use of an active alignment scheme in conjunction with an optimized optical design. The active alignment scheme uses a redundant set of optical links and the active selection of the best link. The optical design maximizes the alignment tolerances between the two boards.
A novel board-to-board free space optical interconnect which operates on the principle of redundancy is described. Tolerance to misalignment is achieved through the use of 2D arrays of lasers and detectors together with an adaptive alignment algorithm based on redundant transceivers and a defocused optical interconnect. In this system, four 1.25 Gb/s data channels are supported by transmitter modules and receiver modules (2 per board) which contain 3 X 3 VCSEL and 3 X 3 photodiode arrays, respectively. The system was designed to have lateral misalignment tolerance of +/- 1 mm and angular tolerance of +/- 1 degree(s).
Andrew Kirk, David Plant, Ted Szymanski, Z. Vranesic, John Trezza, Frank Tooley, D. Rolston, Michael Ayliffe, Frederic Lacroix, D. Kabal, Brian Robertson, Eric Bernier, D. Filiatrault-Brosseau, Feras Michael, E. Chuah
We describe the design and implementation of a free-space optical interconnect for multi-processor and backplane applications. The system is designed to interconnect 4 nodes in a unidirectional ring, with a total of 256 data channels propagating from node to node. Each node contains an array 512 GaAs electro-absorption modulators and 512 photodetectors, hybridly attached to a silicon integrated circuit. Light is relayed between nodes with a rigid micro- optical system. System results are presented.
This paper presents the design of a receiver used in a self- aligning optical interconnect. We have made use of spatial redundancy to increase the misalignment tolerance of a system of four 1 Gb/s free-space optical links. The receiver for this system is a rapidly re-configurable array that accepts nine low-amplitude, high-speed photocurrents, selects one of them, and then outputs that signal as a digital differential positive emitter coupled logic signal. The selection of which channel to amplify is based on received power, and is performed off-chip. Preliminary results indicate that the receiver performs with a low bit error rate up to 750 Mb/s.
Innovative approaches to the packaging of a high-performance module accommodating a 32 X 32 array of surface-active devices indium bump bonded to a 9 X 9 mm2 VLSI chip are described. The module integrates a mini-lens array, a copper heat spreader, a thermoelectric cooler and an aluminum heatsink. The mini-lens array is aligned and packaged with the chip using a novel six degrees of freedom alignment technique. The module is compact (44 X 44 X 45 mm3), easy to assemble and can be passively removed and inserted into a free-space optical system with no need for further adjustments. The chip is mounted directly on a flexible printed-circuit board using a chip-on-board approach, providing 207 bond pad connections to the chip. The junction-to-TEC thermal resistance is only 0.4 degree(s)C/W.
One of the main challenges involved with the successful implementation of free-space optical interconnections is associated with the issue of misalignment. Small misalignments of the components can substantially decrease the coupling efficiency between the source and detector. The alignment problem can be tackled in various ways: the most straightforward solution consists in designing the system to be as misalignment tolerant as possible by using slow f- number beams, oversized apertures or a beam clustering design. Having chosen a suitable design it is then necessary to implement it in such a way that the possible misalignments of each component are minimized, while requiring minimal active alignment control. This paper reports on the implementation of a dense 256-channel free- space multistage optical system which interconnects 4 optoelectronic VLSI chips in a square baseplate 7 cm on a side. Alignment strategies, constraints and experimental results are presented.
In order to provide a reliable optical link, the emitters and detectors within a free-space optical interconnect need to be aligned to each other within tight tolerances. Typical methods to achieve this alignment involve the use of precision optomechanics or active steering elements. An alternative approach to the alignment problem is to use spatial redundancy. One way to accomplish this is by increasing the number of possible optical links and using only a subset of those links to provide reliable high-speed channels. This paper presents the design and testing of a high speed transmitter chip developed for an adaptive redundant optical interconnect system. Optoelectronic design and device packaging will also be described.
Free-space optical interconnects represent a candidate technology to alleviate some of the interconnection bottlenecks currently experienced by high performance electronic systems at the board to board and backplane level [1,2,3]. The two most widely investigated technologies for free-space optical data transmission are multiple quantum modulators (MQW) and arrays of vertical cavity surface emitting lasers (VCSELs). Although VCSELs have many desirable optical attributes, large arrays of VCSELs which can be hybridly attached to CMOS integrated circuits are not yet available. This has motivated the design of modulator-based systems. Recently a ring-based free-space optical interconnect [4] has been designed for optical backplane applications [1]. In this system optical data transmission is achieved by the use of GaAs multiple quantum modulators (MQW) which are used to modulate an externally generated spot array. Here we describe design and assembly of an optical array generator which is used as provide the spot array for this system. This is referred to as the optical power supply (UPS) module. The ring-based system is designed to be scaleable (to 4 or more boards), modular (to allow easy assembly and maintenance), compact and also robust and misalignment tolerant. The UPS for each stage of the system is designed as a separate module that is pre-aligned and then mounted onto the system with minimal additional adjustments. A kinematic mounting technique has been developed to enable the UPS to be demounted and remounted without further realignment.
Optical intercotmects have the potential to overcome the limitations encountered in present electronic backplane technology in providing the information throughput required in ever faster multi-processor computers and lelecommunication switching systems[lJ[2]. A major challenge in this area is the design of robust, misalignment tolerant and field-serviceable optomechanical hardware for optical and optoelectronic components. Components often need to be precisely positioned to tolerances in the micron range laterally and fractions of a degree angularly. Alignment must be maintained despite vibrations, temperature variations and the occasional breakdown and maintenance cycle inherent in an industrial environment. This paper describes the implementation of a novel four-stage clustered optical interconnect designed for use in optical backplane applications[l]. The system optical design is first reviewed (more details can be found in[3]) followed with calculated and measured optical power throughputs. A tolerancing analysis illustrates the benefits of partitioning the system in pre-aligned modular building blocks. This is shown to minimize the number of critical alignment steps and considerably simplifies system assembly. It is then shown how proper optomechanical design allows for the passive insertion of modules to complete system assembly.
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