Paper
28 March 2014 Towards electrical testable SOI devices using Directed Self-Assembly for fin formation
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Abstract
The first fully integrated SOI device using 42nm-pitch directed self-assembly (DSA) process for fin formation has been demonstrated in a 300mm pilot line environment. Two major issues were observed and resolved in the fin formation process. The cause of the issues and process optimization are discussed. The DSA device shows comparable yield with slight short channel degradation which is a result of a large fin CD when compared to the devices made by baseline process. LER/LWR analysis through the DSA process implied that the 42nm-pitch DSA process may not have reached the thermodynamic equilibrium. Here, we also show preliminary results from using scatterometry to detect DSA defects before removing one of the blocks in BCP.
© (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Chi-Chun Liu, Cristina Estrada-Raygoza, Hong He, Michael Cicoria, Vinayak Rastogi, Nihar Mohanty, Hsinyu Tsai, Anthony Schepis, Kafai Lai, Robin Chao, Derrick Liu, Michael Guillorn, Jason Cantone, Sylvie Mignot, Ryoung-Han Kim, Joy Cheng, Melia Tjio, Akiteru Ko, David Hetzer, Mark Somervell, and Matthew Colburn "Towards electrical testable SOI devices using Directed Self-Assembly for fin formation", Proc. SPIE 9049, Alternative Lithographic Technologies VI, 904909 (28 March 2014); https://doi.org/10.1117/12.2046462
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Cited by 5 scholarly publications.
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KEYWORDS
Etching

Directed self assembly

Silicon

Polymethylmethacrylate

Semiconducting wafers

3D modeling

Image processing

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