Inspection of high-aspect ratio layers at sub 20nm node

Abhishek Vikram; Kuan Lin; Janay Camp; Sumanth Kini; Frank Jin; Vinod Venkatesan

doi:10.1117/12.2011574

10 April 2013 Inspection of high-aspect ratio layers at sub 20nm node

Abhishek Vikram, Kuan Lin, Janay Camp, Sumanth Kini, Frank Jin, Vinod Venkatesan

Proceedings Volume 8681, Metrology, Inspection, and Process Control for Microlithography XXVII; 86811Q (2013) https://doi.org/10.1117/12.2011574
Event: SPIE Advanced Lithography, 2013, San Jose, California, United States

Abstract

High aspect ratio defects are more critical at sub 20nm design rule. The impact of these defects in the FEOL module is very critical as it leads to gate leakage which directly translates to yield loss at sub 20nm devices. Image 1a) and 1b) shown below is one such example of a high aspect ratio protrusion seen during the HiK stack for gate last process on a sub 20nm device. False and nuisance defects detected by optical inspection tools, degrade the inspection sensitivity of the tool to real and critical defects[1]. The intention of this paper would be to target two critical FEOL layers post Litho and post etch to detect these critical yield impacting defects using KLA-Tencor 2905 broadband brightfield inspection system for early development learning. In this paper we will discuss the DOE on all the different inspection points to intentionally generate these defects and summarize all the findings.

Citation Download Citation

Abhishek Vikram, Kuan Lin, Janay Camp, Sumanth Kini, Frank Jin, and Vinod Venkatesan "Inspection of high-aspect ratio layers at sub 20nm node", Proc. SPIE 8681, Metrology, Inspection, and Process Control for Microlithography XXVII, 86811Q (10 April 2013); https://doi.org/10.1117/12.2011574

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