Paper
1 April 2013 Track processing optimizations for different EUV resist platforms: preparing for a NXE:3300 baseline process
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Abstract
To make sure a baseline process will be ready for the evaluation of the NXE:3300, imec evaluates promising new EUV resist materials with regards to imaging, process window and line width roughness (LWR) performance. From those screening evaluations, highest performing materials meeting dose sensitivity requirements are selected to be installed on the coat/develop track. This work details the process optimization results of the different selected resist platforms with regards to full wafer processing. Evaluations are executed on the ASML NXE:3100 equipped with a laser-assisted discharge produced plasma source from XTREME technologies, and interfaced to a TEL CLEAN TRACKTM LITHIUS ProTM -EUV.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Philippe Foubert, Koichi Matsunaga, Hideo Shite, Takeshi Shimoaoki, Kathleen Nafus, Anne-Marie Goethals, Dieter Van Den Heuvel, Jan Hermans, Eric Hendrickx, and Hitoshi Kosugi "Track processing optimizations for different EUV resist platforms: preparing for a NXE:3300 baseline process", Proc. SPIE 8679, Extreme Ultraviolet (EUV) Lithography IV, 86792T (1 April 2013); https://doi.org/10.1117/12.2011514
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Photoresist processing

Semiconducting wafers

Extreme ultraviolet

Line width roughness

Standards development

Coating

Extreme ultraviolet lithography

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