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Life testing/qualification of reflowed (1st reflow) and reworked (1st reflow, 1st removal, and then 1st rework) advanced ceramic column grid array (CCGA) surface mount interconnect electronic packaging technologies for future flight projects has been studied to enhance the mission assurance of JPL-NASA projects. The reliability of reworked/reflowed surface mount technology (SMT) packages is very important for short-duration and long-duration deep space harsh extreme thermal environmental missions. The life testing of CCGA electronic packages under extreme thermal environments (for example: -185°C to +125°C) has been performed with reference to various JPL/NASA project requirements which encompass the temperature range studied. The test boards of reflowed and reworked CCGA packages (717 Xilinx package, 624, 1152, and 1272 column Actel Packages) were selected for the study to survive three times the total number of expected temperature cycles resulting from all environmental and operational exposures occurring over the life of the flight hardware including all relevant manufacturing, ground operations, and mission phases or cycles to failure to assess the life of the hardware. Qualification/life testing was performed by subjecting test boards to the environmental harsh temperature extremes and assessing any structural failures, mechanical failures or degradation in electrical performance solder-joint failures due to either overstress or thermal cycle fatigue. The large, high density, high input/output (I/O) electronic interconnect SMT packages such as CCGA have increased usage in avionics hardware of NASA projects during the last two decades. The test boards built with CCGA packages are expensive and often require a rework to replace a reflowed, reprogrammed, failed, redesigned, etc., CCGA packages. Theoretically speaking, a good rework process should have similar temperature-time profile as that used for the original manufacturing process of solder reflow. A multiple rework processes may be implemented with CCGA packaging technology to understand the effect of number of reworks on the reliability of this technology for harsh thermal environments. In general, reliability of the assembled electronic packages reduces as a function of number of reworks and the extent is not known yet. A CCGA rework process has been tried and implemented to design a daisy-chain test board consists of 624 and 717 packages. Reworked CCGA interconnect electronic packages of printed wiring polyimide boards have been assembled and inspected using non-destructive x-ray imaging and optical microscope techniques. The assembled boards after 1st rework and 1st reflow were subjected to extreme temperature thermal atmospheric cycling to assess their reliability for future deep space JPL/NASA for moderate to harsh thermal mission environments. The resistance of daisy-chained interconnect sections were monitored continuously during thermal cycling to determine intermittent failures. This paper provides the experimental reliability test results to failure of assemblies for the first time of reflowed and reworked CCGA packages under extreme harsh thermal environments.
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