Line-pattern collapse mitigation status for EUV at 32nm HP and below

Michael Carcasi; Derek Bassett; Wallace Printz; Shinichiro Kawakami; Yuichiro Miyata

doi:10.1117/12.916310

19 March 2012 Line-pattern collapse mitigation status for EUV at 32nm HP and below

Michael Carcasi, Derek Bassett, Wallace Printz, Shinichiro Kawakami, Yuichiro Miyata

Proceedings Volume 8325, Advances in Resist Materials and Processing Technology XXIX; 83250K (2012) https://doi.org/10.1117/12.916310
Event: SPIE Advanced Lithography, 2012, San Jose, California, United States

Abstract

Line pattern collapse (LPC) becomes a critical concern as integrated circuit fabrication continues to advance towards the 22 nm node and below. Tokyo Electron Limited (TEL) has been investigating LPC mitigation methods for many years ^[1]. These mitigation methods include surfactant rinses to help reduce surface tension and Laplace pressures forces that accompany traditional DIW rinses. However, the ability to explore LPC mitigation techniques at EUV dimensions is experimentally limited by the cost and availability of EUV exposures. With this in mind, TEL has adopted a combined experimental and simulation approach to further explore LPC mitigation methods. Several analytical models have been proposed ^{[2, 3, 4]} for a LPC simulation approach. However, the analytical models based on Euler beam theory are limited in the complexity of profile and material assumptions. Euler beam based models are also now questionable because they are outside the beam theory's intended aspect ratio regime ^[5]. The authors explore the use of finite element models in addition to Euler beam theory based models to understand resist collapse under typical EUV patterning conditions. The versatility of current finite element techniques allows for exploration of resist material property effects, profile and geometry effects, surface versus bulk modulus effects, and rinse and surfactant rinse effects. This paper will discuss pattern-collapse trends and offers critical learning from this simulation approach combined with experimental results from an EUV exposure system and TEL CLEAN TRACK ACT^TM 12 platform, utilizing state of the art collapse mitigation methods.

Citation Download Citation

Michael Carcasi, Derek Bassett, Wallace Printz, Shinichiro Kawakami, and Yuichiro Miyata "Line-pattern collapse mitigation status for EUV at 32nm HP and below", Proc. SPIE 8325, Advances in Resist Materials and Processing Technology XXIX, 83250K (19 March 2012); https://doi.org/10.1117/12.916310

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available