Paper
18 March 2009 Investigation of EUV-process sensitivities for wafer-track processing
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Abstract
As lithographic technology is moving from single pattern immersion processing for 45nm node to double patterning for the next generation and onward to EUV processing, TEL is committed to understanding the fundamentals and improving our technology to enable customers to meet roadmap expectations. With regards to immersion and double patterning technology, TEL has presented a wide variety of technologies to advance the processing capability of our customers. With regards to EUV technology, we have previously presented work for simulation and modeling of an EUV resist system1 in order to further our understanding of the differences between resist performance from previous platforms and currently available EUV resists. As it's currently unknown which direction resist suppliers will take with regards to platform in order to surpass the current limitations in resolution, roughness and sensitivity trade off's, we need to consider the implications of such kinds of novel platforms to track processing capabilities. In this work, we evaluated two of the more promising materials, to determine processing sensitivities necessary for the development of new hardware and process applications. This paper details the initial study complete for understanding the track process parameters such as dissolution characteristics and the impact of film hydrophobicity. Fundamental processing knowledge from 193 and 248nm technology is applied to understand where processing deviates from known sensitivities and will require more development efforts.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Neil Bradon, Heiko Weichert, K. Nafus, S. Hatakeyama, J. Kitano, H. Kosugi, K. Yoshihara, M. Goethals, and J. Hermans "Investigation of EUV-process sensitivities for wafer-track processing", Proc. SPIE 7271, Alternative Lithographic Technologies, 727148 (18 March 2009); https://doi.org/10.1117/12.814189
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KEYWORDS
Semiconducting wafers

Extreme ultraviolet

Extreme ultraviolet lithography

Photoresist processing

Critical dimension metrology

Finite element methods

Double patterning technology

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