Paper
4 December 2008 Pattern freezing process free litho-litho-etch double patterning
Tomoyuki Ando, Masaru Takeshita, Ryoich Takasu, Yasuhiro Yoshii, Jun Iwashita, Shogo Matsumaru, Sho Abe, Takeshi Iwai
Author Affiliations +
Proceedings Volume 7140, Lithography Asia 2008; 71402H (2008) https://doi.org/10.1117/12.804710
Event: SPIE Lithography Asia - Taiwan, 2008, Taipei, Taiwan
Abstract
Double patterning based on existing ArF immersion lithography is considered the most viable option for 32nm and below CMOS node. Most of double patterning approaches previously described require intermediate process steps like as hard mask etching, spacer material deposition, and resist freezing. These additional steps can significantly add to the cost of production applied the double patterning. In this paper, pattern freezing free litho-litho-etch double patterning process is investigated to achieve a narrow pitch imaging without the intermediate processing steps. Pattern freezing free litho-litho-etch double patterning utilizing positive-positive resist combination demonstrated composite pattern generation.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tomoyuki Ando, Masaru Takeshita, Ryoich Takasu, Yasuhiro Yoshii, Jun Iwashita, Shogo Matsumaru, Sho Abe, and Takeshi Iwai "Pattern freezing process free litho-litho-etch double patterning", Proc. SPIE 7140, Lithography Asia 2008, 71402H (4 December 2008); https://doi.org/10.1117/12.804710
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CITATIONS
Cited by 9 scholarly publications.
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KEYWORDS
Double patterning technology

Lithography

Optical lithography

Photoresist processing

Photomasks

Coating

Semiconducting wafers

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