A hybrid optical package with an 8-channel 18GT/s CMOS transceiver for chip-to-chip optical interconnect

E. Mohammed; J. Liao; A. Kern; D. Lu; H. Braunisch; T. Thomas; S. Hyvonen; S. Palermo; I. A. Young

doi:10.1117/12.764001

8 February 2008 Optical hybrid package with an 8-channel 18GT/s CMOS transceiver for chip-to-chip optical interconnect

E. Mohammed, J. Liao, A. Kern, D. Lu, H. Braunisch, T. Thomas, S. Hyvonen, S. Palermo, I. A. Young

Proceedings Volume 6899, Photonics Packaging, Integration, and Interconnects VIII; 68990Z (2008) https://doi.org/10.1117/12.764001
Event: Integrated Optoelectronic Devices 2008, 2008, San Jose, California, United States

Abstract

We describe the design and development of a high-speed 8-channel hybrid integrated optical transceiver package with Clock and Data Recovery (CDR) circuits. The package concept has been developed to be compatible with microprocessor package technology and at the same time allow the integration of low cost, high-performance optical components. A 90nm CMOS optical transceiver chip, 850nm 10Gb/s GaAs based vertical cavity surface emitting laser (VCSEL) array and PIN photodiode array are flip-chip mounted on a standard microprocessor Land Grid Array (LGA) package substrate. The CMOS drivers and receivers on the transceiver chip and the optical components (VCSEL and Photodiode arrays) are electrically coupled using a short transmission line routed on the top surface of the package. VCSEL and photodiode arrays are optically coupled to on-package integrated polymer waveguide arrays with metallized 45° mirrors. The waveguides, which are terminated with multi-terminal (MT) fiber optic connectors, couple out/in high-speed optical signals to/from the chip. The CMOS transceiver chip fully integrates all analog optical circuits such as VCSEL drivers, transimpedance amplifiers and clock and data recovery (CDR) retiming circuit with a low jitter LC-PLL. Digital circuits for pseudorandom bit-pattern sequence generators (PRBS) and bit-error rate test (BERT) are fully integrated. 20Gb/s electrical and 18Gb/s optical eye diagrams for the transmitter were measured out of the package. A fully packaged transmitter and receiver including clock data recovery at 10Gb/s have also been measured.

Citation Download Citation

E. Mohammed, J. Liao, A. Kern, D. Lu, H. Braunisch, T. Thomas, S. Hyvonen, S. Palermo, and I. A. Young "Optical hybrid package with an 8-channel 18GT/s CMOS transceiver for chip-to-chip optical interconnect", Proc. SPIE 6899, Photonics Packaging, Integration, and Interconnects VIII, 68990Z (8 February 2008); https://doi.org/10.1117/12.764001

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