Paper
30 June 2005 Integrated circuit debug through FPGA emulation: application to a PIC-18 macrocell
Mario Garcia-Valderas, Eduardo de la Torre-Arnanz, Fernando Casado-Ortiz, Luis Entrena-Arrontes, Teresa Riesgo-Alcaide
Author Affiliations +
Proceedings Volume 5837, VLSI Circuits and Systems II; (2005) https://doi.org/10.1117/12.608398
Event: Microtechnologies for the New Millennium 2005, 2005, Sevilla, Spain
Abstract
FPGA emulation has become a common way to check if a digital circuit has been correctly designed. Although in the last years FPGA vendors have developed tools to embed logic analysers along with circuits in FPGAs, like Chipscope ILA from Xilinx, FPGA emulation still lacks the availability of more effective and versatile debug methods and tools. In order to check microprocessor system designs, several approaches have been used, including several combinations of logic simulators, instruction simulators, hardware emulators and in-circuit emulators. Nowadays, System-On-Chip design requires the implementation of microprocessor cores in FPGAs for prototyping. These cores do not usually include built-in debug features. In this paper, methods and tools for the development and operation of FPGA debug features are presented. Debug features are implemented in FPGAs through the insertion of JTAG accessible debug modules into the target design. The debug modules that have already been designed offer features that range from simple event detection and signal monitoring to the most powerful and resource consuming, like tracing, complex event and sequence detection and microprocessor in-circuit emulation. The most important properties of the presented debug features are their high configurability, which allow adjusting them to available logic resources, remote control of debug logic and expandability by means of user customized debug blocks. Tools have been developed to automate the required tasks: debug logic selection and configuration, debug logic insertion and debug logic operation. The proposed methods and tools have been applied to a microprocessor system based on a PIC-18 macrocell and implemented in a Xilinx Spartan-3 FPGA.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Mario Garcia-Valderas, Eduardo de la Torre-Arnanz, Fernando Casado-Ortiz, Luis Entrena-Arrontes, and Teresa Riesgo-Alcaide "Integrated circuit debug through FPGA emulation: application to a PIC-18 macrocell", Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); https://doi.org/10.1117/12.608398
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KEYWORDS
Sensors

Logic

Field programmable gate arrays

Signal detection

Clocks

Chromium

Signal processing

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