Paper
17 May 2005 Automated yield forecasting in a high product mix ASIC facility
Duane Barber, Mark Giewont, Jeff Hanson, Jun Shen
Author Affiliations +
Abstract
Yield forecasting is a key component in running a successful semiconductor fab. It is also a significant challenge for facilities such as ASIC houses, which fabricate a wide range of devices using multiple technologies. Yield forecasting takes on increased significance in these environments, with new products introduced frequently and many products running only in small numbers. An accurate yield prediction system can greatly accelerate the process of identifying design bugs, test program issues and process integration problems. To this end, we have constructed a forecasting model geared for our ASIC manufacturing line. The model will accommodate an arbitrary number of design and/or process elements, each with an associated defectivity term. In addition, we have automated the generation of the yield forecast through passively linking to the already existing EDA design tools and scripts used by LSI Logic. Once the model is constructed, an automated query engine can extract the design and process parameters for any requested device, insert the data into the forecasting model, and deliver the resulting yield prediction. The actual yield for any lot or group of lots may thus be compared to the forecast, greatly assisting yield enhancement activities. This is especially useful for prototype lots and low-volume devices, for which it eliminates a great deal of manual computation and searching of design files. Using the model in conjunction with the query engine, any deviations from expected yield performance are generated automatically, quickly and efficiently highlighting opportunities for improvement.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Duane Barber, Mark Giewont, Jeff Hanson, and Jun Shen "Automated yield forecasting in a high product mix ASIC facility", Proc. SPIE 5755, Data Analysis and Modeling for Process Control II, (17 May 2005); https://doi.org/10.1117/12.600079
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KEYWORDS
Data modeling

Logic

Instrument modeling

Databases

Metals

Yield improvement

Semiconducting wafers

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