Simulation of bipolar/MOSFET hybrid mode transistor with Si/GeSi heterojunction base

Wei-Lian Guo; Ping-Juan Niu; Xiao-Yun Li; Lu-Hong Mao

doi:10.1117/12.582331

28 February 2005 Simulation of bipolar/MOSFET hybrid mode transistor with Si/GeSi heterojunction base

Wei-Lian Guo, Ping-Juan Niu, Xiao-Yun Li, Lu-Hong Mao

Proceedings Volume 5649, Smart Structures, Devices, and Systems II; (2005) https://doi.org/10.1117/12.582331
Event: Smart Materials, Nano-, and Micro-Smart Systems, 2004, Sydney, Australia

Abstract

Bipolar/MOSFET hybrid mode lateral transistor is a transistor in which both bipolar and MOSFET currents flow simultaneously. Because of (1) Good compatibility with CMOS technology; (2) Larger current driving capability and transconductance than MOSFET. So, it is suitable to be taken as a bipolar device in BiCMOS element. In this paper, the Si/SiGe heterostructure, under the gate, is introduced into the conventional bipolar/MOSFET hybrid mode transistor. So a hybrid mode transistor with a lateral n⁺-Si/p-SiGe/n⁺-Si structure parallel in base is formed, in which the heterostructure of E-B junction n⁺-Si/p-SiGe has a high injection electron current from E to B region and a low injection hole current from B to E region (result in by higher barrier for hole), then the total injection efficiency will increase. When this effect becomes a main mechanism than that of the barrier lowering in the surface depletion layer, the characteristics of the device will be dependent on the parameters of SiGe alloy, such as the mole number of Germanium etc. The device simulation of Si/SiGe heterojunction base hybrid mode transistor has been carried out by MEDICI program. The simulation results show that I_C and h_FE increase with Mole number of Ge increasing and W_B decreasing, then the current gain and current capability are improved than that of conventional bipolar/MOSFET hybrid Mode transistor.

Citation Download Citation

Wei-Lian Guo, Ping-Juan Niu, Xiao-Yun Li, and Lu-Hong Mao "Simulation of bipolar/MOSFET hybrid mode transistor with Si/GeSi heterojunction base", Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); https://doi.org/10.1117/12.582331

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