Paper
2 June 2003 Calibration strategies for overlay and registration metrology
Richard M. Silver, Michael T. Stocker, Ravikiran Attota, Michael Bishop, Jau-Shi Jay Jun, Egon Marx, Mark P. Davidson, Robert D. Larrabee
Author Affiliations +
Abstract
Critical dimensions in current and next generation devices are driving the need for tighter overlay registration tolerances and improved overlay metrology tool accuracy and repeatability. Tool matching, performance evaluation, and a move towards closed-loop image placement control all place an increase on the importance of improved accuracy and calibration methodology. In response to these industry needs, the National Institute of Standards and Technology (NIST) is introducing a calibrated overlay wafer standard. There are, however, a number of calibration requirements, which must be addressed when using these standards. These include identification of the best methods for evaluating uncertainties when using traceable, calibration artifacts, proper data acquisition and analysis, and the best calibration strategy.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Richard M. Silver, Michael T. Stocker, Ravikiran Attota, Michael Bishop, Jau-Shi Jay Jun, Egon Marx, Mark P. Davidson, and Robert D. Larrabee "Calibration strategies for overlay and registration metrology", Proc. SPIE 5038, Metrology, Inspection, and Process Control for Microlithography XVII, (2 June 2003); https://doi.org/10.1117/12.488486
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Cited by 2 scholarly publications.
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KEYWORDS
Calibration

Overlay metrology

Error analysis

Semiconducting wafers

Metrology

Detection and tracking algorithms

Cameras

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