Paper
23 August 2000 Fault detection in CMOS manufacturing using MBPCA
Sivan Lachman-Shalem, Nir Haimovitch, Eitan N. Shauly, Daniel R. Lewin
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Abstract
This paper describes the application of model-based principal component analysis (MBPCA) to the identification and isolation of faults in CMOS manufacture. Some of the CMOS fabrication processing steps are well understood, with first principles mathematical models available which can describe the physical and chemical phenomena that takes place. The fabrication of the device using a known industrial process is therefore first modeled 'ideally', using ATHENA and MATLAB. Detailed furnace models are used to investigate the effect of errors in furnace control on the device fabrication and the subsequent effect on the device electrical properties. This models the distribution of device properties resulting from processing a stack of wafers in a furnace, and allows faults and production errors to be simulated for analysis. The analysis is performed using MBPCA. which has been shown to improve fault-detection resolution for batch processes. The diagnosis method is demonstrated on an industrial NMOS transistor fabrication process with faults introduced in places where they might realistically occur.
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Sivan Lachman-Shalem, Nir Haimovitch, Eitan N. Shauly, and Daniel R. Lewin "Fault detection in CMOS manufacturing using MBPCA", Proc. SPIE 4182, Process Control and Diagnostics, (23 August 2000); https://doi.org/10.1117/12.410084
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KEYWORDS
Semiconducting wafers

Oxides

Data modeling

Oxidation

Network on a chip

Instrument modeling

Mathematical modeling

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