Suppression of floating body effect by controlling potential profile in the lower body region of SOI MOSFETs

Yasuhiro Sato; Toshiaki Tsuchiya

doi:10.1117/12.360568

1 September 1999 Suppression of floating body effect by controlling potential profile in the lower body region of SOI MOSFETs

Yasuhiro Sato, Toshiaki Tsuchiya

Author Affiliations +

Proceedings Volume 3881, Microelectronic Device Technology III; (1999) https://doi.org/10.1117/12.360568
Event: Microelectronic Manufacturing '99, 1999, Santa Clara, CA, United States

Abstract

This paper describes a new way to suppress the floating body effect (FBE) in SOI MOSFETs, which is applicable to the CMOS structure. The FBE can be suppressed by controlling the potential profile in the lower body region of SOI MOSFETs. The threshold voltage (V_T) of SOI NMOSFETs little depends on drain voltage (V_D) when impact ionization is not significant. V_T is determined by the total body charge. On the contrary, when impact ionization significantly occurs, V_T largely depends on V_D. The accumulation of holes in a floating body raises the body bias, and thus the increase in the body bias determines V_T. From the examination of the influence of a substrate voltage (V_SUB), it is clarified that there is a maximum value of V_SUB (V_SUB,MAX) below which the V_T measured at V_D higher than 1 V does not depend on V_SUB. It is also clarified that the dependence of V_T on V_D can be drastically improved by supplying a V_SUB that is higher than V_SUB,MAX. This means that supplying an adequate V_SUB is effective in suppressing the FBE. Holes accumulated in the NMOS body region are significantly decreased by the V_SUB supply, which is supported by 2D device simulation, and hence the FBE in SOI NMOSFETs is suppressed. Supplying positive V_SUB little affects the PMOSFETs characteristics, except for an increase in V_T. Therefore, this method is useful for the SOI CMOSFET structure.

Citation Download Citation

Yasuhiro Sato and Toshiaki Tsuchiya "Suppression of floating body effect by controlling potential profile in the lower body region of SOI MOSFETs", Proc. SPIE 3881, Microelectronic Device Technology III, (1 September 1999); https://doi.org/10.1117/12.360568

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
11 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Field effect transistors

Silicon

Ionization

Oxides

Capacitance

Device simulation

Telecommunications

Show All Keywords

Keywords/Phrases

Search In:

Publication Years