Paper
10 March 1999 Effect of polysilicon interface on stress in multistacked polysilicon films
Chang-Auck Choi, Chang Seung Lee, Won-Ick Jang, Jong-Hyun Lee, Byung-Ki Shon
Author Affiliations +
Proceedings Volume 3680, Design, Test, and Microfabrication of MEMS and MOEMS; (1999) https://doi.org/10.1117/12.341186
Event: Design, Test, and Microfabrication of MEMS/MOEMS, 1999, Paris, France
Abstract
In this paper, we present a detailed study of the effect of the interface in multi-stacked polysilicon film. In order to investigate microstructural stress characteristics, we fabricated laminated type 2 micrometers thickness of polysilicon test structures such as bridges and rotating beam pairs. Also the characteristics of the various doping and deposition method, and annealing treatment are examined through the SIMS analysis. The relative interface location was carried by changing the film thickness for each deposition step and this was compared with 2 micrometers thick film deposited at a time. We found that the interface is one of the key factors deciding the stress gradient in multi- stacked polysilicon film but the residual stress is independent of the interface location. Finally, on the basis of the result, fabricated a test pattern of the multi- stacked polysilicon microstructure with thickness of 6.5 micrometers using the symmetrical stacking and doping method has a low stress of 7.6 MPa and a low stress gradient of -0.15 MPa/micrometers .
© (1999) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Chang-Auck Choi, Chang Seung Lee, Won-Ick Jang, Jong-Hyun Lee, and Byung-Ki Shon "Effect of polysilicon interface on stress in multistacked polysilicon films", Proc. SPIE 3680, Design, Test, and Microfabrication of MEMS and MOEMS, (10 March 1999); https://doi.org/10.1117/12.341186
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KEYWORDS
Doping

Interfaces

Phosphorus

Annealing

Bridges

Low pressure chemical vapor deposition

Deposition processes

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