Real-time image histogram equalization using FPGA

Xiying Li; GuoQiang Ni; Yanmei Cui; Tian Pu; Yanli Zhong

doi:10.1117/12.319719

19 August 1998 Real-time image histogram equalization using FPGA

Xiying Li, GuoQiang Ni, Yanmei Cui, Tian Pu, Yanli Zhong

Proceedings Volume 3561, Electronic Imaging and Multimedia Systems II; (1998) https://doi.org/10.1117/12.319719
Event: Photonics China '98, 1998, Beijing, China

Abstract

A new hardware implementation of histogram equalization by means of Field Programmable Gate Array (FPGA) is presented. Histogram equalization is an effective means of image enhancement. Its real-time processing requires a great deal of memory and very high processing speed. The logic cell nature of XC4000 family's FPGA is most suitable for performing real-time pixel-level image processing operations such as histogram equalization. A core is constructed to complete this histogram statistics and histogram equalization. As a result, the chip makes circuits and system more effective than ever, and it takes very short time to complete the calculation and generate the look-up table. The equalizing technique is described and implementation results using a Xilinx XC4010 FPGA are presented.

Citation Download Citation

Xiying Li, GuoQiang Ni, Yanmei Cui, Tian Pu, and Yanli Zhong "Real-time image histogram equalization using FPGA", Proc. SPIE 3561, Electronic Imaging and Multimedia Systems II, (19 August 1998); https://doi.org/10.1117/12.319719

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