Effect of different barrier materials on antifuse performance

Ting Cheong Ang; Man Siu Tse; Lap Hung Chan; John L. Sudijono

doi:10.1117/12.324390

28 August 1998 Effect of different barrier materials on antifuse performance

Ting Cheong Ang, Man Siu Tse, Lap Hung Chan, John L. Sudijono

Proceedings Volume 3510, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis IV; (1998) https://doi.org/10.1117/12.324390
Event: Microelectronic Manufacturing, 1998, Santa Clara, CA, United States

Abstract

An antifuse is a programmable interconnect element used in field programmable gate arrays (FPGAs). It is made up of an insulating layer sandwiched by 2 electrodes. The device is normally off and have a high resistance when unprogrammed. However, with the application of a programming voltage or current pulse, the antifuse turns into a 'fuse' of low resistance due to the breakdown of the insulator, accompanied by the formation of a conductive path or filament through the insulating layer. Metal to metal antifuse are favored for high sped and high density FPGAs because they offer low on-resistance, small device area and high reliability. In FPGAs incorporating antifuses, there are typically thousands of antifuses and their leakage currents are quite substantial, thereby leading to considerable power consumption. Leakage current, I_leakage reduction can be achieved through the discerning choice of electrodes, antifuse stack material, stack composition, thickness and film deposition process conditions amongst others. In this paper, the electrical characteristics of the amorphous silicon-based antifuse with different types of barrier layers are presented. We show that the inclusion of an in-situ top barrier layer in the a- Si:H based antifuse leads to a significant reduction in the leakage current with no appreciable increase in the programming voltage.

Citation Download Citation

Ting Cheong Ang, Man Siu Tse, Lap Hung Chan, and John L. Sudijono "Effect of different barrier materials on antifuse performance", Proc. SPIE 3510, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis IV, (28 August 1998); https://doi.org/10.1117/12.324390

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