Paper
27 August 1997 Ultrathin oxide for sub-0.25-μm technology in silicon ICs: impact of stacking and nitridation
Pradip K. Roy, Yi Ma
Author Affiliations +
Abstract
We have developed a thin (35, 50 and 65 angstrom) gate oxidation process for Lucent's sub-0.25 micrometer technologies and their enhancement modules. These oxides have significantly improved quality (defect density < 0.3/cm2, Ebd > 18 MV/cm, log Nbd > -0.3 C/cm2 and Dit and Of < 2 X 1010/cm2-eV) as a result of stacking and nitridation. Impacts of stacking and nitridation on leakage (Do), breakdown (Ebd), wear-out (Nbd) and charge trapping behavior (Dit and Qf) are more dramatic for thinner (35 and 50 angstrom) oxides where Si/SiO2 interfacial sub-structure plays a dominant role. Stacked oxide generates a planar and stress-free interface due to stress modulation during densification/oxidation. These stress- budgeted oxides are more resistant to process/induced damage that causes variability in MOSFET parameters and degradation during hot-carrier and Fowler-Nordhaim stressing. Light nitrogen incorporation (less than 5%) improves thickness uniformity, charge-to-breakdown (Nbd) and endurance, nitrogen incorporation also reduces Si-H bonds by replacing with Si-N bonds resulting in a reduction traps and increased interface resistance to current stress.
© (1997) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Pradip K. Roy and Yi Ma "Ultrathin oxide for sub-0.25-μm technology in silicon ICs: impact of stacking and nitridation", Proc. SPIE 3212, Microelectronic Device Technology, (27 August 1997); https://doi.org/10.1117/12.284620
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KEYWORDS
Oxides

Interfaces

Oxidation

Silicon

Nitrogen

Resistance

Semiconducting wafers

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