Particle reduction study at interlayer dielectric deposition

Anda McAfee; Mercedes Jacobs; Robert Hiatt

doi:10.1117/12.250908

13 September 1996 Particle reduction study at interlayer dielectric deposition

Anda McAfee, Mercedes Jacobs, Robert Hiatt

Proceedings Volume 2876, Process, Equipment, and Materials Control in Integrated Circuit Manufacturing II; (1996) https://doi.org/10.1117/12.250908
Event: Microelectronic Manufacturing 1996, 1996, Austin, TX, United States

Abstract

Experiments were carried out to characterize and reduce defectivity at interlayer dielectric (ILD) deposition on a chemical vapor deposition (CVD) reactor. There was evidence that some of the yield limiting defects for product originated from ILD deposition. Several approaches were taken to address this problem. Film thickness dependence, plasma extinguishing techniques, and in-situ cleans were investigated. Film thickness was a concern because a new ILD process requiring a thicker film had been implemented in conjunction with chemical mechanical polishing (CMP). It was found that particle size tends to increase with increasing film thickness. A literature search disclosed a recommended procedure for reducing particles based on a plasma extinguishing technique that effectively levitated particles before flushing them from the chamber. This technique was evaluated with inconclusive results. Through the course of the study it was found that the in-situ clean times had the largest effect on defectivity. Non-optimized in-situ cleans caused higher particle counts. An internally manufactured optical endpoint detector was used to optimize cleans. Recent work compares the traditional two-step in-situ clean to a single-step clean. Two equipment configurations and clean gas combinations were tested. Results document improvements in particle performance and throughput.

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Anda McAfee, Mercedes Jacobs, and Robert Hiatt "Particle reduction study at interlayer dielectric deposition", Proc. SPIE 2876, Process, Equipment, and Materials Control in Integrated Circuit Manufacturing II, (13 September 1996); https://doi.org/10.1117/12.250908

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KEYWORDS

Particles

Semiconducting wafers

Plasma

Atmospheric particles

Dielectrics

Chemical vapor deposition

Chemical mechanical planarization

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