Paper
21 May 1996 Real-time overlay modeling in a sub-0.50 um production environment using the IVS-100 optical metrology system
Bhanu P. Singh, Robert M. Newcomb
Author Affiliations +
Abstract
As mainstream semiconductor processes move into sub 0.50 micron geometries, the industry requirement for stricter process control of the photolithography process and equipment becomes increasingly crucial. In order to qualify their lithography steppers during the installation process, most fabrication facilities measure overlay registration targets and then perform extensive analysis to determine the systematic grid and intrafield errors induced by the stepper. As the stepper is released to the production environment, overlay registration is measured in order to monitor the process based on mean and standard deviations instead of grid and intrafield analysis. The limitations induced by the differences between the stepper qualification and process monitoring are investigated. In addition, a real-time solution is presented to minimize these differences and improve upon the process monitoring techniques utilized by leading edge manufacturers. The end result is increased process monitoring fidelity, increased equipment utilization and a move from a static to predictive (continuous) tuning environment for the photolithography steppers.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Bhanu P. Singh and Robert M. Newcomb "Real-time overlay modeling in a sub-0.50 um production environment using the IVS-100 optical metrology system", Proc. SPIE 2725, Metrology, Inspection, and Process Control for Microlithography X, (21 May 1996); https://doi.org/10.1117/12.240100
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KEYWORDS
Error analysis

Overlay metrology

Manufacturing

Statistical analysis

Process control

Semiconducting wafers

Optical lithography

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