Paper
10 April 1995 128 x 128 CMOS photodiode-type active pixel sensor with on-chip timing, control, and signal chain electronics
Robert H. Nixon, Sabrina E. Kemeny, Craig O. Staller, Eric R. Fossum
Author Affiliations +
Proceedings Volume 2415, Charge-Coupled Devices and Solid State Optical Sensors V; (1995) https://doi.org/10.1117/12.206529
Event: IS&T/SPIE's Symposium on Electronic Imaging: Science and Technology, 1995, San Jose, CA, United States
Abstract
A 128 X 128 element CMOS active pixel image sensor (APS) with on-chip timing, control, and signal chain electronics has been designed, fabricated and tested. The chip is implemented in 1.2 micrometers n-well process with a 19.2 micrometers pixel pitch. The sensor uses a photodiode-type CMOS APS pixel with in-pixel source follower, row selection and reset transistors. The sensor operates from a +5 V supply and requires only a clock signal to produce video output. The chip performs correlated double sampling (CDS) to suppress pixel fixed pattern noise, and double delta sampling (DDS) to suppress column fixed pattern noise. The on-chip control circuitry allows asynchronous control of an inter frame delay to adjust pixel integration. On-chip control is also provided to select the readout of any size window of interest.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Robert H. Nixon, Sabrina E. Kemeny, Craig O. Staller, and Eric R. Fossum "128 x 128 CMOS photodiode-type active pixel sensor with on-chip timing, control, and signal chain electronics", Proc. SPIE 2415, Charge-Coupled Devices and Solid State Optical Sensors V, (10 April 1995); https://doi.org/10.1117/12.206529
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CITATIONS
Cited by 61 scholarly publications and 51 patents.
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KEYWORDS
Sensors

Transistors

Clocks

Electronics

Interference (communication)

Photodiodes

Control systems

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