Application of algorithm-based fault tolerance to high-level synthesis of signal flow graphs

Tanay Karnik; Shankar Ramaswamy; Steve M. Kang; Prithviraj Banerjee

doi:10.1117/12.190886

28 October 1994 Application of algorithm-based fault tolerance to high-level synthesis of signal flow graphs

Tanay Karnik, Shankar Ramaswamy, Steve M. Kang, Prithviraj Banerjee

Proceedings Volume 2296, Advanced Signal Processing: Algorithms, Architectures, and Implementations V; (1994) https://doi.org/10.1117/12.190886
Event: SPIE's 1994 International Symposium on Optics, Imaging, and Instrumentation, 1994, San Diego, CA, United States

Abstract

Algorithm based fault tolerance techniques have been used for systolic processors and general purpose multiprocessors. In this paper, we have applied an algorithm based fault tolerance technique to high-level synthesis of signal flow graphs. The technique incorporates reliability into synthesized DSP filters. Given a Signal Flow Graph representation for these filters, our schemes synthesize a reliable schedule for the operations in them and allocate functional units to the operations subject to hardware and reliability constraints. We impose reliability constraints to avoid compensating errors in fault detection. Our first scheme uses the well known duplicate and compare approach, while the second uses a novel linearity based checking approach used in algorithm based fault tolerance methods for matrix computations. The schemes have been implemented and results obtained by using them on sample signal flow graphs are presented. These results show the linearity based scheme to have a low time overhead. For example, this scheme takes about 10% extra time for the reliable synthesis of a 10^th order IIR filter. Our proposed work extends previous work in the area in three directions: (1) use of linearity based checks, over duplication based checks, (2) handling cyclic flow graphs, over previous proposals for acyclic graphs, and (3) reliability constrained hardware mapping. Extensions of the schemes to nonlinear flow graphs is also proposed.

Citation Download Citation

Tanay Karnik, Shankar Ramaswamy, Steve M. Kang, and Prithviraj Banerjee "Application of algorithm-based fault tolerance to high-level synthesis of signal flow graphs", Proc. SPIE 2296, Advanced Signal Processing: Algorithms, Architectures, and Implementations V, (28 October 1994); https://doi.org/10.1117/12.190886

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KEYWORDS

Reliability

Digital signal processing

Tolerancing

Nonlinear filtering

Linear filtering

Error control coding

Algorithms

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