Overlay distortions in wafer-scale integration lithography

Warren W. Flack

doi:10.1117/12.150451

8 August 1993 Overlay distortions in wafer-scale integration lithography

Warren W. Flack

Proceedings Volume 1927, Optical/Laser Microlithography; (1993) https://doi.org/10.1117/12.150451
Event: SPIE'S 1993 Symposium on Microlithography, 1993, San Jose, CA, United States

Abstract

Wafer scale integration (WSI) lithography is the technique used to fabricate ultra large scale integration (ULSI) integrated circuits significantly greater in size than current products. Applications for WSI lithography include large solid state detector arrays, large area liquid crystal displays, high speed mainframe supercomputers, and large random access memories. The lithography technology required to manufacture these devices is particularly challenging, requiring stringent control of both submicron critical dimensions and accurate alignment of level to level device patterns over large chip areas.

Citation Download Citation

Warren W. Flack "Overlay distortions in wafer-scale integration lithography", Proc. SPIE 1927, Optical/Laser Microlithography, (8 August 1993); https://doi.org/10.1117/12.150451

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