Paper
10 November 2022 Optimization methods of comparators design
Hanliang Chen, Shaojuan Feng, Yian Ge, Yingxiu Yao
Author Affiliations +
Proceedings Volume 12331, International Conference on Mechanisms and Robotics (ICMAR 2022); 1233122 (2022) https://doi.org/10.1117/12.2652779
Event: International Conference on Mechanisms and Robotics (ICMAR 2022), 2022, Zhuhai, China
Abstract
This paper introduces four different designs of the comparator in recent years. The edge-pursuit comparator (EPC), which is a new energy-efficient ring oscillator collapse-based comparator, can automatically scale comparison energy according to its input difference and eliminating unnecessary energy. To reduce the energy consumption, the pre-amplifier output node of a dynamic bias comparator (DBC) partially discharge by adding a tail capacitor. The novel two-stage dynamic comparator with a transconductance-enhanced latching stage efficiently decreases the delay and energy consumption. Furthermore, an improvement of the traditional comparator for precise application is introduced. The new comparator applies PMOS transistors at the input of the preamplifier and the latch stage, and both are controlled by a special clock generator which lets the new comparator achieve optimum delay and with no excess power consumption. This paper describes each comparator in detail and compares different features of them.
© (2022) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hanliang Chen, Shaojuan Feng, Yian Ge, and Yingxiu Yao "Optimization methods of comparators design", Proc. SPIE 12331, International Conference on Mechanisms and Robotics (ICMAR 2022), 1233122 (10 November 2022); https://doi.org/10.1117/12.2652779
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Transistors

Curium

Capacitors

Clocks

Oscillators

Positive feedback

Amplifiers

RELATED CONTENT

A research of comparator design
Proceedings of SPIE (February 14 2022)
A novel method of measurement of LC circuits Q-factor
Proceedings of SPIE (September 28 2016)
High-performance 480x12x4 linear CMOS IR multiplexer
Proceedings of SPIE (October 26 1999)
A 0.9V 11.74 13.68GHz class F2,3 CMOS VCO with typical...
Proceedings of SPIE (April 01 2024)
10 bit 20 Msample s ADC for low voltage low...
Proceedings of SPIE (September 07 1998)

Back to Top