Poster + Presentation + Paper
26 May 2022 In-line monitoring of overlay and process window using design-assisted voltage contrast inspection for 14nm FINFET technology
Author Affiliations +
Conference Poster
Abstract
A variety of middle-of-line lithography overlay (OVL) and process window (PW) parameters have been monitored using PDF Solutions Design-for-InspectionTM (DFITM) in 14nm FinFET technology. The DFI system, which incorporates voltage contrast (VC) electron beam (e-beam) technique on PDF Solutions knowledge based test structure designs, has proven to assist lithography overlay control and process diagnostics, covering process loops of epitaxy, metal gate (MG), contact on active (M0A), contact on metal gate (M0P) as well as segmentation cuts of M0A and MG. In-line eBeam scans are performed after Contact CMP, and OVL and PW parameters are extracted from the curve fitting of VC signals responding to misalignment values. For each process module, dedicated test structures with different layout attributes are designed and placed on the wafer to characterize OVL and PW sensitivity to feature density, geometry and substrate doping. In this work, the concept of DFI system, with specific illustration of DFI M0A to MG OVL measurement to assist inline OVL control and process fix is reported. Although eBeam-based Voltage Contrast techniques traditionally have been used to detect Open and Short failures, and cannot be used to directly measure critical dimensions (CD) of patterned features, the DFI system is designed to monitor integrated process window (PW) variation introduced either by an intentional process split or an unintentional process/tool drift in production line. The results presented below demonstrate DFI capability to assist in-line OVL and PW control for yield enhancement, production monitoring, and excursion prevention.
Conference Presentation
© (2022) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Runling Li, I-Kai Hsu, Tomasz Brozek, Linrong Yang, Debiao He, Fangrui Wu, Jiadong Ren, Yefang Zhu, Yan Zhang, Pei Liu, Haiqiong Zhang, Guifeng Zhang, Yingying Fu, Shan Yin, Yujie Jia, and Bo Yu "In-line monitoring of overlay and process window using design-assisted voltage contrast inspection for 14nm FINFET technology", Proc. SPIE 12053, Metrology, Inspection, and Process Control XXXVI, 120531U (26 May 2022); https://doi.org/10.1117/12.2613633
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KEYWORDS
Lithography

Semiconducting wafers

Process control

Inspection

Fin field effect transistors

Optical alignment

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