Optimization Of Optimetrix Wafer Steppers In Very Large Scaled Integrated Circuit (VLSI) Process

Tonny Soesanto; Ken Harrison

doi:10.1117/12.941896

29 June 1984 Optimization Of Optimetrix Wafer Steppers In Very Large Scaled Integrated Circuit (VLSI) Process

Tonny Soesanto, Ken Harrison

Proceedings Volume 0470, Optical Microlithography III: Technology for the Next Decade; (1984) https://doi.org/10.1117/12.941896
Event: 1984 Microlithography Conferences, 1984, Santa Clara, United States

Abstract

Step and repeat projection aligners have evolved as the major lithographic system in the development of VLSI technology. High numerical aperture lenses get the resolution down to 1.0um or smaller, while the fully automatic field-by-field alignments provide the potential for achieving overlay accuracy of a small fraction of a micron. This paper will discuss the various options available to the users of Optimetrix 8010 (10 to 1 system) wafer steppers to get the best overlay registration. The effect of autoalignment iterations and autoalignment limits will be discussed against throughput and overlay registration on various substrates. A new alignment mark was used to achieve better alignment accuracy and automatic dia camera feature on the system was also evaluated. As a device becomes more complex and occupies a larger area, intradie pattern distortions (hence system-system) may significantly contribute to overlay error. This intradie pattern distortion may be caused by temperature fluctuations and distortion inherent in the design of the lenses. Both of these factors were evaluated and the intradie overlay errors are compared to interdie overlay errors. These interdie and intradie overlay errors determine the total stepper error which must be incorporated in the design rules.

Citation Download Citation

Tonny Soesanto and Ken Harrison "Optimization Of Optimetrix Wafer Steppers In Very Large Scaled Integrated Circuit (VLSI) Process", Proc. SPIE 0470, Optical Microlithography III: Technology for the Next Decade, (29 June 1984); https://doi.org/10.1117/12.941896

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KEYWORDS

Optical alignment

Semiconducting wafers

Semiconductors

Cameras

Tolerancing

Optical lithography

Reticles

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